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VDP3108 Datasheet(PDF) 29 Page - Micronas |
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VDP3108 Datasheet(HTML) 29 Page - Micronas |
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29 / 61 page ![]() ADVANCE INFORMATION VDP 3108 MICRONAS INTERMETALL 29 Name Default Function Mode Number of bits I2C Sub address 1e 8 r measurement adc status and fast blank input status measurement status register bit [0] 0/1 tube measurement active / complete bit [2:1] white drive measurement cycle 00 red 01 green 10 blue 11 reserved bit [3] 0/1 picture measurement active / complete bit [4] 0/1 fast blank input low / high (static) bit [5] 1 fast blank input negative transition (reset at read) bit [7:6] reserved – PMS 32 8 w fast blank interface mode bit [0] 0 fast blank from FBLIN pin 1 force internal fast blank signal to high bit [1] 0/1 fast blank active high/low bit [2] 0 clmpref 1 bit [7:3] reserved – FBMD DISPLAY PROCESSOR – TIMING 6f 9 w v vertical blanking start bit [8:0] 0..511 first line of vertical blanking 305 VBST 73 9 w v vertical blanking stop bit [8:0] 0..511 last line of vertical blanking 25 VBSO 6b 9 w v start of active video bit [8:0] 0..511 first line of active video 30 AVST DISPLAY PROCESSOR – HORIZONTAL DEFLECTION 67 9 w v adjustable delay from front sync to PLL2 adjust analog and digital RGB bit [8:0] –256..+255 +/– 8 µsec –141 POFS2 63 9 w v adjustable delay from fly back to PLL2 adjust horizontal position for analog RGB picture bit [8:0] –256..+255 +/– 8 µsec 0 POFS3 7e 9 w v adjustable delay from fly back to main sync adjust horizontal position for digital picture bit [8:0] allowed values ? 120 HPOS 17 8 w/r start of horizontal blanking bit [7:0] 0..255 0..th 1 HBST 16 8 w/r end of horizontal blanking bit [7:0] 0..255 0..th 48 HBSO |
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