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LAN91C111 Datasheet(PDF) 38 Page - Microchip Technology

Part # LAN91C111
Description  10/100 Non-PCI Ethernet Single Chip MAC PHY
PDF  125 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN91C111 Datasheet(HTML) 38 Page - Microchip Technology

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LAN91C111
DS00002276A-page 38
 2011-2016 Microchip Technology Inc.
8.0
MAC DATA STRUCTURES AND REGISTERS
8.1
Frame Format In Buffer Memory
The frame format in memory is similar for the Transmit and Receive areas. The first word is reserved for the status word.
The next word is used to specify the total number of bytes, and it is followed by the data area. The data area holds the
frame itself. By default, the last byte in the receive frame format is followed by the CRC, and the Control byte follows
the CRC.
BYTE COUNT - Divided by two, it defines the total number of words including the STATUS WORD, the BYTE COUNT
WORD, the DATA AREA, the CRC, and the CONTROL BYTE. The CRC is not included if the STRIP_CRC bit is set.
The maximum number of bytes in a RAM page is 2048 bytes.
The receive byte count always appears as even; the ODDFRM bit of the receive status word indicates if the low byte of
the last word is relevant.
FIGURE 8-1:
DATA FRAME FORMAT
Transmit Packet
Receive Packet
STATUS WORD
Written by CSMA upon transmit
completion (see Status Register)
Written by CSMA upon receive
completion (see RX Frame Status
Word)
BYTE COUNT
Written by CPU
Written by CSMA
DATA AREA
Written/modified by CPU
Written by CSMA
CONTROL BYTE
Written by CPU to control odd/even
data bytes
Written by CSMA; also has odd/even
bit
RESERVED
BYTE COUNT (always even)
STATUS WORD
DATA AREA
LAST DATA BYTE (if odd)
bit0
bit15
RAM
OFFSET
(DECIMAL)
0
2
4
2046 Max
CONTROL BYTE
Last Byte
1st Byte
2nd Byte
CRC (4 BYTES)



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