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LAN91C111 Datasheet(PDF) 88 Page - Microchip Technology |
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LAN91C111 Datasheet(HTML) 88 Page - Microchip Technology |
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88 / 125 page ![]() 2011-2016 Microchip Technology Inc. DS00002276A-page 89 LAN91C111 Note: If no EEPROM is connected to the LAN91C111, for example for some embedded applications, the ENEEP pin should be grounded and no accesses to the EEPROM will be attempted. Configuration, Base, and Indi- vidual Address assume their default values upon hardware reset and the CPU is responsible for program- ming them for their final value. FIGURE 11-1: 64 X 16 SERIAL EEPROM MAP CONFIGURATION REG. BASE REG. CONFIGURATION REG. BASE REG. CONFIGURATION REG. BASE REG. CONFIGURATION REG. BASE REG. CONFIGURATION REG. BASE REG. CONFIGURATION REG. BASE REG. CONFIGURATION REG. BASE REG. IA0-1 IA2-3 IA4-5 IOS2-0 WORD ADDRESS 000 0h 1h 4h 5h 8h 9h Ch Dh 10h 11h 14h 15h 18h 19h 20h 21h 22h 001 010 011 100 101 110 XXX 16 BITS |
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