PC87303 datasheet(73/114 Pages) NSC

73 / 114 page

70 Parallel Port (Continued)

IEEE P1284 Draft 200 September 10 1993 Microsoft’s

ECP Protocol and ISA Interface Standard revision 114

July 7 1993 provide detailed descriptions of Level 2 IO

buffers

When an EPP or ECP mode is configured with the excep-

tion of ECP mode 000 the following parallel port pins have

Level 2 IO buffers PD0 – PD7 STB AFD INIT SLIN ACK

ERR SLCT PE and BUSY

(See DC Electrical Characterisitics Section 111 for further

information)

72 DATA REGISTER (DTR)

TLC12074 – 28

This is a bidirectional data port that transfers 8-bit date The

direction is determined by the PTR7 and the CTR5 bits

When PTR7 is high the CTR5 bit will determine the data

direction in conjunction with the Read and Write strobes

When PTR7 bit is low the parallel port operates in the out-

put mode only See PTR7 bit and CTR5 bit for further infor-

mation The reset value of this register is 0 See Table 7-3

73 STATUS REGISTER (STR)

TLC12074 – 29

This register provides status for the signals listed below It is

a read only register Writing to it is an invalid operation that

has no effect

Bit 0

When in EPP mode this is the timeout status bit

When this bit is 0 no timeout

When this bit is 1 timeout occurred on EPP cycle

(minimum 10 ms)

It is cleared to 0 after STR is read ie consecutive

reads (after the first read) always return 0 It is also

cleared to 0 when EPP is enabled (bit 0 of PCR is

changed from 0 to 1)

When not in EPP mode this bit is 1

Bit 1

Reserved this bit is always 1

Bit 2

In the compatible mode (PTR7 bit is 0) or in ECP and

EPP bit 4 of PCR e 0 this bit is always one

In the Extended Mode (PTR7 bit is 1) or in ECP and

EPP with bit 4 of PCR e 1 this bit is the IRQ

STATUS bit

In the Extended mode if CTR4 e 1 then this bit is

latched low when the ACK signal makes a transition

from low to high Reading this bit sets it to a one

Bit 3

This bit represents the current state of the printer

error signal (ERROR) The printer sets this bit low

when there is a printer error This bit follows the state

of the ERR pin

Bit 4

This bit represents the current state of the printer

select signal (SLCT) The printer sets this bit high

when it is selected This bit follows the state of the

SLCT pin

Bit 5

This bit represents the current state of the printer

paper end signal (PE) The printer sets this bit high

when it detects the end of the paper This bit follows

the state of the PE pin

Bit 6

This bit represents the current state of the printer

acknowledge signal (ACK) The printer pulses this

signal low after it has received a character and is

ready to receive another one This bit follows the

state of the ACK pin

Bit 7

This bit (BUSY) represents the current state of the

printer busy signal The printer sets this bit low when

it is busy and cannot accept another character This

bit is the inverse of the (BUSYWAIT) pin

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