PC87303 datasheet(86/114 Pages) NSC

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90 Keyboard Controller and Real-Time Clock (Continued)

91 PC87303 KBC FUNCTION

911 Host System Interface

Common Signals

The keyboard controller is interfaced to the host system

through a common system interface The interface consists

of the address bus A0 – A9 Address Enable (AEN) signal

data bus D0 – D7 and control signals IO Read (IOR) IO

Write (IOW) and Chip Select (CS) (see

Figure 9-2 )

Address bus A0 – A9 connects to the system address

SA0 – SA9 of the system The PC87303 uses the system

address and the AEN signal to decode the access to the

configuration register

Data bus D0 – D7 connects to the peripheral bus XD0 – XD7

of the system

The IOR and IOW inputs connect to the IOR and IOW lines

of the system All read and write operations to the PC87303

are IO operations

The CS pin is the keyboard controller chip-select It must be

connected to the keyboard controller chipselect signal of

the system when bit 6 of KRR is 0 The PC87303 decodes

the keyboard controller chip-select from A0 – A9 (60h or

64h) when bit 6 of KRR is 1

System Interface Registers

The keyboard controller consists of three 8-bit registers

Data Byte Buffer Output (DBBOUT) Data Byte Buffer Input

(DBBIN) and STATUS See

Figure 9-2

The DBBOUT register is used to transfer data from the key-

board controller to the host system It is written by the key-

board controller using the OUT DBBA instruction A data

read operation by the host system reads its content

The DBBIN register is used to transfer data from the host

system to the keyboard controller It is written by the host

system It is read by the keyboard controller using an IN

A DBB instruction

The STATUS register holds status information related to the

system interface

Figure 9-3 shows the bit definition It is

read-only by the system

ST7

ST6

ST5

ST4

IBF

OBF

bit

7654

FIGURE 9-3 Status Register

Bit 0

OBF Output Buffer Full A 1 indicates that data is

written into the DBBOUT register It is cleared by a

system read operation

Bit 1

IBF Input Buffer Full When a write operation is

performed by the host system it will be set to 1

Upon executing an IN ADBB instruction it will be

cleared

Bit 2

F0 A general purpose flag that can be cleared or

toggled by the keyboard controller software

Bit 3

F1 CommandData Flag This flag holds the state

of A2 when the host system performs a write oper-

ation It is typically used to distinguish between

commands and data coming from the host system

For example when A2 e 1 F1 e 1 and indicates

a command was written by the host When A2 e

0 F1 e 0 indicating data was written by the host

Bits 4-7

ST4 – ST7 General purpose flags They can be

written by a MOV STSA instruction

Table 9-1 shows the register address decoding utilized by

the keyboard control system interface

TABLE 9-1 Summary of System Interface Operations

Operation

Read DBBOUT

Write DBBIN F1 Clear

Read STATUS

Write DBBIN F1 Set

No Operation

For further information about CS refer to bit 6 of KRR

TLC12074 – 38

FIGURE 9-2 Keyboard Controller to Host System Interface

PC87303 Datasheet(PDF) 86 Page - National Semiconductor (TI)

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