VT6516 datasheet(56/73 Pages) ETC

56 / 73 page

VIA Technologies, Inc.

Preliminary VT6516 Datarsheet

-56-

Addres

(offset

)

Function

Name

Bits

Defau

Value

00H

EEPROM word address

For a 256-byte EEPROM device, an 8-bit data object is identified

with this register. For a 512-byte EEPROM device, an 8-bit data

object is identified with this register plus EEDEVADDR[1]. For a

1024-byte EEPROM device, an 8-bit data object is identified with

this register plus EEDEVADDR[2:1], vice versa.

EEWDAD

[7:0]

01H

EEPROM data

Every data access to EEPROM is in unit of 8 bits, stored in this

EEDATA [7:0]

02H

EEPROM device address

bit 7-4 : device type id (EEPROM 1010)

bit 3-1 : device id

bit 0 : r/w command , value 0: write; value 1: read

The triple of 4-bit PHY device type ID, 3-bit device ID, and 7-bit

word address forms a unique access address to an 8-bit EEPROM

data object.

This register’s bit 0 is used to specify the command type: 0 for write

and 1 for read. A read or write operation takes about 0.4 ms so that

the CPU has to read the EEYSTS register periodically to check if the

issued command is “complete without error” or “ack error”.

EEDEVA

DDR

[7:0]

03H

EEPROM status register

3’b000: idle

3’b001: busy

3’b010: complete without error

3’b100: ack error

This register indicates the status of the EEPROM control module.

Initially, the EEPROM control module is in the idle status. While a

read or write command is issued by writing 1/0 to EEDEVADDR[0],

EESTS becomes “busy” immediately, and goes into the “complete”

status as this operation finishes or into the “ack error” as an

acknowledge error happens. Then, a following “read status”

command will cause it back to the “idle” status, or a following

read/write command will cause it into the “busy” status.

EESTS

[2:0]

R/O

4.8 Registers of CPU Interface Module

* Base Address: 2000H

Addres

(offset

)

Function

Name

Bits

Defau

Value

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