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VT6516 Datasheet(PDF) 58 Page - List of Unclassifed Manufacturers

Part # VT6516
Description  16/12 PORT 10/1000 ASE T/TX
PDF  73 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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VT6516 Datasheet(HTML) 58 Page - List of Unclassifed Manufacturers

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VIA Technologies, Inc.
Preliminary VT6516 Datarsheet
-58-
20H
Write packet command
3’b100 : end of frame with the remaining data size = 2 bytes
3’b101 : end of frame with the remaining data size = 1 byte
(that is the low byte as using 16-bit write)
3’b000 : idle
3’b001 : start of frame for the next write
3’b010 : middle of frame for the next write
3’b011 : abort the unfinished packet write
CPU should write this command register before repeatedly writing
8/16 bit packet data VIA the ISA/IDE bus (with a2, a1, a0 = 000).
WR_PKT_
CMD
[2:0]
W/
O
21H
Packet Abort
Write this register to drop an incoming packet ready to be read by
CPU.
ERR_ABO
RT
[0]
W/
O
30H
bits [47:40] of switch base MAC address [47:0]
Each port in the switch IC has a unique MAC address with the port
ID as address bits [3:0] and the same MAC base bits [47:4],
specified by the register SWITCH_MAC_BASE[47:4].
SWITCH_
MAC_BA
SE
[7:0] 0
R/
W
31H
bits [39:32] of switch base MAC address [47:0]
SWITCH_
MAC_BA
SE
[7:0] 0
R/
W
32H
bits [31:24] of switch base MAC address [47:0]
SWITCH_
MAC_BA
SE
[7:0] 0
R/
W
33H
bits [23:16] of switch base MAC address [47:0]
SWITCH_
MAC_BA
SE
[7:0] 0
R/
W
34H
bits [15:8] of switch base MAC address [47:0]
SWITCH_
MAC_BA
SE
[7:0] 0
R/
W
35H
bits [7:4] of switch base MAC address [47:0]
SWITCH_
MAC_BA
SE
[7:4] 0
R/
W
40H
interrupt mask register
bit 0: PHY interrupt mask
bit 1: EEPROM interrupt mask
bit 2: packet received interrupt mask
bit 3: packet sent interrupt mask
The four interrupts can be masked individually. The value 0
indicates “Masked”, and value 1 (default) indicates “Unmasked”.
IRQSTS_
MASK
[3:0] 4’b11
11
R/
W



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