MFC2000 datasheet(322/426 Pages) ETC

322 / 426 page

MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

16-24

Conexant

100723A

If the PC has read all the data in the memory blocks successfully, an interrupt will be generated. ARM can read

the USBIRQ register to determine that it is DMA channel 0 interrupt. By reading DMA 0 configuration register can

determine it is a logic channel 0 or 2 interrupt. Then ARM can repeat step 3 and 4 to set more memory blocks.

1.1.516.3.5 BULK_OUT Transfer

The MaxPacketSize for both bulk in pipes are 64 bytes. DMA channel 0 is assigned to USB and it has four logic

channels. Endpoint 2 and 4, which are bulk out endpoints, are assigned to logic channel 1 and 3. The procedures

of programming the registers are:

Enable DMA channel 0 by writing 1 to bit[0] of DMA 0 configuration register.

Enable logic channel 1 or 3 and set logic channel 1 or 3 to be write mode by setting the corresbonding bits in

DMA 0 configuration register.

Set memory address in DMAUSB1CntLo and DMAUSB1CntHi or DMAUSB3CntLo and DMAUSB3CntHi.

Define block size in DMAUSB1BlkSiz or DMAUSB3BlkSiz.

If more than one memory block is needed, repeat step 3 and 4 to set desired memory blocks.

Set endpoint 2 or 4 control register.

If the PC has write to all the memory blocks successfully, an interrupt will be generated. ARM can read the

USBIRQ register to determine that it is DMA channel 0 interrupt. By reading DMA 0 configuration register can

determine it is a logic channel 1 or 3 interrupt. Then ARM can repeat step 3 and 4 to set more memory blocks.

If the PC send an odd byte count packet in the middle of a bulkout transaction, an interrupt will be generated to

indicate that an single byte has been send to the memory location.

1.1.616.3.6 USB Suspend and Device Remote Wake-up

The MFC2000 supports device remote wake-up. If the UDC core detected the USB bus being idle for 3 ms, it will

generated a suspend signal and an interrupt will be generated. ARM can determine that it is a suspend interrupt

by reading the usb interrupt register then clear the interrupt by setting the clear_suspend_int bit in the clear

interrupt register. The suspend status bit will remain high until the PC performs a global wake up or the ARM

performs a device remote wake up. The ARM performs a device remote wake up by setting the resume_device bit

in the endpoint status register to be “1”.

1.1.716.3.7 USB Reset

An interrupt will be generated if a USB reset is detected on the USB bus. ARM can determine that it is a

usb_reset_interrupt by reading the usb interrupt register then clear the interrupt by setting the clear_usb_reset_int

bit in the clear interrupt register.

1.1.816.3.8 Software Reset

The ARM can reset the UDC core and related logic by setting the bit 0 in USBSofReset register.

MFC2000 Datasheet(PDF) 322 Page - List of Unclassifed Manufacturers