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MFC2000 Datasheet(PDF) 370 Page - List of Unclassifed Manufacturers |
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MFC2000 Datasheet(HTML) 370 Page - List of Unclassifed Manufacturers |
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370 / 426 page ![]() MFC2000 Multifunctional Peripheral Controller 2000 Hardware Description 21-2 Conexant 100723A 21.2 Register Description Name/Address Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Default PWM Channel 0 Control (PWMCh0Ctrl) 01FF80C1h ALTTONE/ PWMCh0 Output Select 0=ALTTONE 1=PWMCh0 (not used) (not used) (not used) (not used) (not used) (not used) PWMCh0 Clock Divider Rst. Value 0xxxxxx0b Read Value 0xxxxxx0b Name/Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default PWM Channel 0 Control (PWMCh0Ctrl) 01FF80C0h Bit 7 of PWMCh0 Duty Cycle Control Bit 6 of PWMCh0 Duty Cycle Control Bit 5 of PWMCh0 Duty Cycle Control Bit 4 of PWMCh0 Duty Cycle Control Bit 3 of PWMCh0 Duty Cycle Control Bit 2 of PWMCh0 Duty Cycle Control Bit 1 of PWMCh0 Duty Cycle Control Bit 0 of PWMCh0 Duty Cycle Control Rst. Value 00h Read Value 00h Bit 15 Controls which signal is output to the GPIO[11]/CPCIN/GPIO[11] pin (PWM channel 0 output signal, CPCIN input signal, or GPIO input/output signal). Bit 8/GPIOConfig1 Register Bit 15/PWMCh0Ctrl Register GPIO[11]/CPCIN/PWM0 Pin 0 0 GPIO[11] 0 1 GPIO[11] 1 0 CPCIN 11 PWM0 Bit 8 PWMCh0 clock divider (n = 0-1) PWMCh0 clock = AUXCLK n () + 1 Bits 7-0 Duty cycle control (n = 0 - 255) PWMCh0 signal frequency = PWMCh clock 0 256 PWMCh0 signal ‘high’ period = n + 1 256 * PWMCh0 signal cycle time PWMCh0 signal ‘low’ period = 256 1 256 −+ () n * PWMCh0 signal cycle time |
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