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MFC2000 Datasheet(PDF) 383 Page - List of Unclassifed Manufacturers |
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MFC2000 Datasheet(HTML) 383 Page - List of Unclassifed Manufacturers |
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383 / 426 page ![]() Hardware Description MFC 2000 Multifunctional Peripheral Controller 2000 100723A Conexant 23-3 23.2 Register Description Address: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Default: P80CONTROL 0x01FF88E1 (not used) (not used) (not used) (not used) (not used) (not used) (not used) (not used) Rst Value xxh Read Value 00h Address: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default: P80CONTROL 0x01FF88E0 (not used) SSD Ringwaken SSD Raw_ringn Ext Raw_ringn Ring_Sel[1:0] EXTIA_ MODE IA_SEL Rst Value xxxx0000b Read Value 00h Bit 15:7 Not used Bit 6 This is read only bit which indicates status of ring envelope from SSD. Bit 5 This is a read only bit which indicates raw ring signals from SSD. Bit 4 This is a read only bit which indicates raw ring signals from external DAA. Bit 3:2 This control bits are used to select types of ring signals to be connected to P80_CORE to perform ring detection. “00” : No selection, logic ‘high’ will be driven to PB[3]_C of P80_CORE. “01” : SSD Raw_ringn is selected. “10” : SSD Ringwaken is selected. “11” : External DAA Raw_ringn is selected. Bit 1 This bit controls muxing of output I/O pins. When asserted to high, selected P80 core pins will be directed to external pin. Bit 0 This bit controls muxing of primary and secondary I/O pins in P80 core. When asserted to high, secondary I/O will be selected. |
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