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MFC2000 Datasheet(PDF) 137 Page - List of Unclassifed Manufacturers

Part # MFC2000
Description  Multifunctional Peripheral Controller 2000
PDF  426 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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MFC2000 Datasheet(HTML) 137 Page - List of Unclassifed Manufacturers

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Hardware Description
MFC 2000 Multifunctional Peripheral Controller 2000
100723A
Conexant
5-11
Voltage Threshold
Margin
V
off
TADCREF
±30 mV
V
hys
20 mV
±2 mV
Note: The output voltage to represent logic 0 must be guaranteed to be at ADGA (typically
ADGA = GND = 0V).
The input resistance to the voltage detector is specified as follows:
Min
R
in
Input Resistance
10 M
Ω
A voltage divider circuit will be used externally in order to obtain the desired voltage to monitor the
power.
MFC2K
Voltage
Detector
power1
5V or 3.3V
R1
R2
power_down1
ADVA
R
in
Figure 5-7. Voltage Divider Circuit
5.2
Watchdog Timer
The Watchdog Timer is intended to guard against firmware lockup on the part of either Executive-controlled
background tasks or Interrupt-driven tasks, and can only be enabled by a sequence of events under control of the
Watchdog Control Logic. Once the Watchdog Timer has been enabled, it can not be disabled (inactivated) unless
a system reset occurs. The watchdog timer block diagram is provided in Figure 5-8, and the Watchdog Time-Out
Timing Diagram is provided in Figure 5-9.
The Watchdog Timer is enabled by the following sequence of events, which MUST occur in the order described.
1.
Write the value of the desired Time-out interval to the Watchdog Interval register. The first write to this register
disables subsequent writes, and enables the next event in the enable sequence.
2.
Write $0F followed by $F0 to the WatchdogEnRetrigger register. The data written to this register MUST be in
the order specified or it is ignored.
3.
After the operations are completed, the value in the Watchdog Interval register is loaded into the Time-out
Down Counter.



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