AD6674 datasheet(32/97 Pages) AD

32 / 97 page

Data Sheet

AD6674

Rev. C | Page 31 of 96

INPUT FREQUENCY (MHz)

6.5×

7.5×

8.5×

Figure 83. Buffer Current Sweeps, AD6674-750 (SFDR vs. Input Frequency and

IBUFF); 800 MHz < fIN < 2 GHz; Front-End Network Shown in Figure 74

Figure 84, Figure 85, and Figure 86 show the SFDR vs. analog

input frequency for various buffer settings for the AD6674-500.

The recommended settings shown in Table 10 were used to take

the data while changing the contents of register 0x018 only.

100

10.3

95.3

150.3 180.3 240.3 301.3 340.7 390.3 450.3

INPUT FREQUENCY (MHz)

1.0×

1.5×

2.0×

3.0×

4.5×

Figure 84. Buffer Current Sweeps, AD6674-500 (SFDR vs. Input Frequency and

IBUFF); 10 MHz < fIN < 450 MHz; Front-End Network Shown in Figure 74

450.3

480.3

510.3

515.3

610.3

765.3

810.3

985.3

4.0×

5.0×

6.0×

7.0×

8.0×

INPUT FREQUENCY (MHz)

Figure 85. Buffer Current Sweeps, AD6674-500 (SFDR vs. Input Frequency and

IBUFF); 450 MHz < fIN < 1000 MHz; Front-End Network Shown in Figure 74

1010.3

1205.3

1410.3

1600.3

1810.3

1950.3

INPUT FREQUENCY (MHz)

4.0×

5.0×

6.0×

7.0×

8.0×

Figure 86. Buffer Current Sweeps, AD6674-500 (SFDR vs. Input Frequency and

IBUFF); 1 GHz < fIN < 2 GHz; Front-End Network Shown in Figure 74

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