PCI7620 datasheet(68/248 Pages) TI

68 / 248 page

3–23

NOTE: The 16-bit PC Card must implement the proper pullup resistors for the COE and

PWRDWN modes.

3.9.6

Suspend Mode

The SUSPEND signal, provided for backward compatibility, gates the PRST (PCI reset) signal and the GRST (global

reset) signal from the PCI7x20 device. Besides gating PRST and GRST, SUSPEND also gates PCLK inside the

PCI7x20 device in order to minimize power consumption.

It should also be noted that asynchronous signals, such as card status change interrupts and RI_OUT, can be passed

to the host system without a PCI clock. However, if card status change interrupts are routed over the serial interrupt

stream, then the PCI clock must be restarted in order to pass the interrupt, because neither the internal oscillator nor

an external clock is routed to the serial-interrupt state machine. Figure 3–13 is a signal diagram of the suspend

function.

RESET

GNT

SUSPEND

PCLK

RESETIN

SUSPENDIN

PCLKIN

External Terminals

Internal Signals

Figure 3–13. Signal Diagram of Suspend Function

3.9.7

Requirements for Suspend Mode

The suspend mode prevents the clearing of all register contents on the assertion of reset (PRST or GRST) which

would require the reconfiguration of the PCI7x20 device by software. Asserting the SUSPEND signal places the PCI

outputs of the controller in a high-impedance state and gates the PCLK signal internally to the controller unless a PCI

transaction is currently in process (GNT is asserted). It is important that the PCI bus not be parked on the PCI7x20

device when SUSPEND is asserted because the outputs are in a high-impedance state.

The GPIOs, MFUNC signals, and RI_OUT signal are all active during SUSPEND, unless they are disabled in the

appropriate PCI7x20 registers.

PCI7620 Datasheet(PDF) 68 Page - Texas Instruments