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PCI7620 Datasheet(PDF) 9 Page - Texas Instruments |
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PCI7620 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 248 page ![]() x List of Illustrations Figure Title Page 2–1 PCI7420 and PCI7620 GHK-Package Terminal Diagram 2–1 . . . . . . . . . . . . . 3–1 PCI7x20 System Block Diagram 3–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2 3-State Bidirectional Buffer 3–2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3 Serial ROM Application 3–4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4 SPKROUT Connection to Speaker Driver 3–10 . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5 Two Sample LED Circuits 3–11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–6 Serial-Bus Start/Stop Conditions and Bit Transfers 3–13 . . . . . . . . . . . . . . . . . . 3–7 Serial-Bus Protocol Acknowledge 3–13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–8 Serial-Bus Protocol—Byte Write 3–13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–9 Serial-Bus Protocol—Byte Read 3–14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–10 EEPROM Interface Doubleword Data Collection 3–14 . . . . . . . . . . . . . . . . . . . . 3–11 IRQ Implementation 3–19 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–12 System Diagram Implementing CardBus Device Class Power Management 3–21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–13 Signal Diagram of Suspend Function 3–23 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–14 RI_OUT Functional Diagram 3–24 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–15 Block Diagram of a Status/Enable Cell 3–27 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–16 TP Cable Connections 3–29 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–17 Typical Compliant DC Isolated Outer Shield Termination 3–29 . . . . . . . . . . . . . 3–18 Non-DC Isolated Outer Shield Termination 3–30 . . . . . . . . . . . . . . . . . . . . . . . . . 3–19 Load Capacitance for the PCI7x20 PHY 3–31 . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–20 Recommended Crystal and Capacitor Layout 3–31 . . . . . . . . . . . . . . . . . . . . . . . 5–1 ExCA Register Access Through I/O 5–2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–2 ExCA Register Access Through Memory 5–2 . . . . . . . . . . . . . . . . . . . . . . . . . . . 6–1 Accessing CardBus Socket Registers Through PCI Memory 6–1 . . . . . . . . . . 12–1 Test Load Diagram 12–4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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