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DA9313

High Efficiency Dual Cell Switched Capacitor Divider

Datasheet

Revision 3.0

07-Apr-2017

CFR0011-120-00

16 of 54

7.5

VDDIO

Table 9: VDDIO Characteristics

Unless otherwise noted, the following is valid for TJ = -40 ºC to +125 ºC, VDD = 5 V to 10.5 V

Parameter

Description

Conditions

Min

Typ

Max

Unit

VDDIO

Internal VDDIO

voltage rail

Internally generated, no

external capacitor

Configurable via

VDDIO_CONF

1.5

1.8

3.3

VDDIO_ACC

Accuracy of internal

VDDIO voltage rail

-5

7.6

Digital I/O Characteristics

Table 10: Digital I/O Characteristics

Unless otherwise noted, the following is valid for TJ = -40 ºC to +125 ºC, VDD = 5 V to 10.5 V, VDDIO

enabled

Parameter

Description

Conditions

Min

Typ

Max

Unit

VIH_ONKEY

HIGH level input

voltage @ pin

nONKEY

1.1

VIL_ONKEY

LOW level input

voltage @ pin

nONKEY

0.4

VHYS_ONKEY

Hysteresis voltage

pin nONKEY

100

RO_PU_GPO

Pull-up resistor @

GPO

Ω

RI_PD_GPI

Pull-down resistor

@ GPI

210

Ω

RI_PU_ONKEY

Pull-up resistor @

nONKEY

To VCORE

kΩ

VIH

GPI_0-1, SCL,

SDA,

Input HIGH voltage

0.7*VDDIO

VIL

GPI_0-1, SCL,

SDA,

Input LOW voltage

0.3*

VDDIO

VOH

GPO_0-1

Output HIGH

voltage

Push-pull mode

@1 mA

0.8*

(VCORE or

VDDIO)

VOL1

GPO_0-1, SDA,

Output LOW

voltage

@IOL = 1 mA

0.1

VOL3

SDA,

Output LOW

voltage

@IOL = 3 mA

0.24

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