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LTC2972 Datasheet(PDF) 10 Page - Linear Technology

Part # LTC2972
Description  2-Channel PMBus Power System Manager Featuring Programmable Power Good Outputs
PDF  112 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

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LTC2972
10
2972fa
For more information www.linear.com/LTC2972
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive. All currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified. If power is supplied to the chip via the VDD33 pin only, connect
VPWR and VDD33 pins together.
Note 3: The ADC total unadjusted error includes all error sources.
First, a two-point analog trim is performed to achieve a flat reference
voltage (VREF) over temperature. This results in minimal temperature
coefficient, but the absolute voltage can still vary. To compensate for this,
a high resolution, drift-free, and noiseless digital trim is applied at the
output of the ADC, resulting in a very high accuracy measurement.
Note 4: Hysteresis in the output voltage is created by package stress
that differs depending on whether IC was previously at a higher or lower
temperature. Output voltage is always measured at 25°C, but the IC is
cycled to 105°C or –40°C before successive measurements. Hysteresis is
roughly proportional to the square of the temperature change.
Note 5: The current sense resolution is determined by the L11 format,
the value of IOUT_CAL_GAIN, and the magnitude of the current being
measured. See Table 3 on page 77 for details.
Note 6: The nominal time between successive ADC conversions (latency of
the ADC) for any given channel is tUPDATE_ADC.
Note 7: VSENSE and ISENSE input currents are characterized by input
current and input differential current. Input current is defined as current
into a single device pin (see Note 2). Input differential current is defined
as (I+ – I–) where I+ is the current into the positive device pin and I– is the
current into the negative device pin.
Note 8: Nonlinearity is defined from the first code that is greater than or
equal to the maximum offset specification to full-scale code, 1023.
Note 9: While READ_VIN operates with 0V ≤ VIN_SNS ≤ 15V, the valid READ_
IIN, READ_PIN, and MFR_EIN operating range is 4.5V ≤ VIN_SNS ≤ 15V.
Note 10: EEPROM endurance and retention are guaranteed by design,
characterization and correlation with statistical process controls. The
minimum retention specification applies for devices whose EEPROM has
been cycled less than the minimum endurance specification.
Note 11: EEPROM endurance and retention will be degraded when
TJ > 105°C.
Note 12: The LTC2972 will not acknowledge any PMBus commands,
except for MFR_COMMON, when a STORE_USER_ALL command is being
executed. See also OPERATION section.
Note 13: Maximum capacitive load, CB, for SCL and SDA is 400pF. Data
and clock rise time (tr) and fall time (tf) are: (20 + 0.1• CB) (ns) < tr < 300ns
and (20 + 0.1 • CB) (ns) < tf < 300ns. CB = capacitance of one bus line in pF.
SCL and SDA external pull-up voltage, VDDIO, is 1.35V < VDDIO < 3.6V.
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33 = VDDIO, VDD33, VDD25, REFP and REFM
pins floating, unless otherwise indicated. CVDD33 = 100nF, CVDD25 = 100nF, CVIN_SNS_CAP = 10nF and CREF = 100nF. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
tSP
Pulse Width of Spike Suppressed
(Note 13)
98
ns
tTIMEOUT_BUS Time Allowed to Complete any
PMBus Command After Which Time
SDA Will Be Released and Command
Terminated
Mfr_config_all_longer_pmbus_timeout = 0
Mfr_config_all_longer_pmbus_timeout = 1
l
l
25
200
35
280
ms
ms
Additional Digital Timing Characteristics
tOFF_MIN
Minimum Off-Time for Any Channel
100
ms



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