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LTC2972 Datasheet(PDF) 44 Page - Linear Technology |
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LTC2972 Datasheet(HTML) 44 Page - Linear Technology |
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44 / 112 page ![]() LTC2972 44 2972fa For more information www.linear.com/LTC2972 MFR_CONFIG_ALL_LTC2972 This command is used to configure parameters that are common to both channels on the IC. They may be set or reviewed from any PAGE setting. MFR_CONFIG_ALL_LTC2972 Data Contents BIT(S) SYMBOL OPERATION b[15:13] Reserved Don’t care. Always returns 0. b[12] Mfr_config_all_en_short_cycle_fault Enable short cycle fault detection. See Mfr_status_2_short_cycle_fault on page 74 for more information. 0: Issuing an ON before prior OFF is complete will not cause a fault. 1: Issuing an ON before prior OFF is complete will cause a fault. b[11] Mfr_config_all_pwrgd_off_uses_uv Selects PWRGD de-assertion source for both channels. 0: PWRGD is de-asserted based on VOUT being below or equal to POWER_GOOD_OFF. This option uses the ADC. Response time is approximately 100ms to 200ms. 1: PWRGD is de-asserted based on VOUT being below or equal to VOUT_UV_LIMIT. This option uses the high speed supervisor. Response time is approximately 12µs. b[10] Reserved Don’t care. b[9] Reserved Don’t care. Always returns 0. b[8] Reserved Don’t care. Always returns 0. b[7] Mfr_config_all_fault_log_enable Enable fault logging to EEPROM in response to Fault. 0: Fault logging to EEPROM is disabled. 1: Fault logging to EEPROM is enabled. b[6] Mfr_config_all_vin_on_clr_faults_en Allow VIN_ON rising edge to clear all latched faults. 0: VIN_ON clear faults feature is disabled. 1: VIN_ON clear faults feature is enabled. b[5] Mfr_config_all_control1_pol Selects active polarity of CONTROL1 pin 0: Active low (pull pin low to start unit). 1: Active high (pull pin high to start unit). b[4] Mfr_config_all_control0_pol Selects active polarity of CONTROL0 pin 0: Active low (pull pin low to start unit). 1: Active high (pull pin high to start unit). b[3] Mfr_config_all_vin_share_enable Allow this unit to hold Share-clock pin low when VIN has not risen above VIN_ON or has fallen below VIN_OFF. When enabled this unit will also turn both channels off in response to Share-clock being held low. 0: Share-clock inhibit is disabled. 1: Share-clock inhibit is enabled. b[2] Mfr_config_all_pec_en PMBus packet error checking enable. 0: PEC is accepted but not required. 1: PEC is enabled. b[1] Mfr_config_all_longer_pmbus_timeout Increase PMBus timeout interval by a factor of 8. Recommended for fault logging. 0: PMBus timeout is not multiplied by a factor of 8. 1: PMBus timeout is multiplied by a factor of 8. b[0] Reserved Always set to 1. PMBus COMMAND DESCRIPTION |
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