DP83952 datasheet(2/90 Pages) NSC

2 / 90 page

General Description (Continued)

The RIC II repeater design consists of two major functional

blocks Segment Specific Block and Shared Functional

Blocks The Segment Specific Block implements the IEEE

repeater requirements on a per network port basis while the

Shared Functional Blocks implement the core logic blocks

for the IEEE repeater unit The Shared Functional Blocks

consist of repeater receive multiplexor an on chip phase

lock loop (PLL) decoder for Manchester data an Elasticity

Buffer for preamble regeneration transmit encoder and de-

multiplexor for Manchester data

The DP83952 RIC II can be connected up to 13 cable seg-

ments via its network interface ports One port is fully AUI

compatible and is able to connect to an external MAU using

the maximum length of AUI cable The other 12 ports have

integrated 10BASE-T transceivers These transceiver func-

tions may be bypassed so that the RIC II may be used with

external transceivers such as the DP8392 coaxial trans-

ceivers

A large repeater unit can be constructed by cascading

RIC IIs together via the Inter-RICTM bus All the cascaded

RIC IIs form a single repeater unit

The RIC II is configurable for specific applications It pro-

vides port status information for LED array displays and a

simple interface for system processors The RIC II possess-

es multi-function counters and status flag arrays to facilitate

network statistics gathering A serial Hub Management In-

terface is available for the collection of data in Managed

Hub applications

Table Of Contents

10 SYSTEM DIAGRAM

20 CONNECTION DIAGRAMS

30 PIN DESCRIPTION

40 BLOCK DIAGRAM

50 FUNCTIONAL DESCRIPTION

51 Summary of DP83952 RIC II Feature Enhancements

from DP83950B RIC

52 Overview of RIC II Functions

53 Description of Repeater Operations

54 Examples of Packet Repetition Scenarios

55 Description of Hardware Connection for Inter-RIC Bus

56 Processor and Display Interface

57 Description of Hardware Connection for Processor

and Display Interface

60 HUB MANAGEMENT SUPPORT

61 Event Counting Function

62 Event Record Function

63 Management Interface Operation

64 Description of Hardware Connection for Management

Interface

70 PORT BLOCK FUNCTIONS

71 Transceiver Functions

72 Segment Partition

73 Port Status Register Functions

74 Local Ports and Inter-RIC Bus Expected Activity

75 Local Ports and Inter-RIC Bus Data Field Contents

80 RIC II REGISTERS

90 AC AND DC SPECIFICATIONS

100 TIMING AND LOAD DIAGRAMS

110 AC TIMING TEST CONDITIONS

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