DP83952 datasheet(89/90 Pages) NSC

89 / 90 page

110 AC Timing Test Conditions

All specifications are valid only if the mandatory isolation is employed and all differential signals are taken to be at the AUI

side of the pulse transformer

Input Pulse Levels (TTLCMOS)

GND to 30V

Input Rise and Fall Times (TTLCMOS)

5 ns

Input and Output Reference Levels (TTLCMOS) 15V

Input Pulse Levels (Diff)

20 VP-P

Input and Output Reference Levels (Diff)

50% Point of the Differential

TRI-STATE Reference Levels

Float (DV) g05V

Output Load (See

Figure Below)

TLF12499 – 42

Note 1

100 pF includes scope and jig capacitance

Note 2

S1 e Open for timing tests for push pull outputs

S1 e VCC for VOL test

S1 e GND for VOH test

S1 e VCC for High Impedance to active low and active low to High Impedance measurements

S1 e GND for High Impedance to active high and active high to High Impedance measurements

Capacitance TA e 25 C f e 1 MHz

Symbol

Parameter

Typ

Units

CIN

Input Capacitance

COUT

Output Capacitance

DERATING FACTOR

Output timings are measured with a purely capacitive load

for 50 pF The following correction factor can be used for

other loads CL t 50 pF a 03 nspF

TLF12499 – 43

Note

In the above diagram the TXa and TXb signals are taken from the

AUI side of the isolation (pulse transformer) The pulse transformer used for

all testing is the Pulse Engineering PE64103

DP83952 Datasheet(PDF) 89 Page - National Semiconductor (TI)

DP83952 Datasheet(HTML) 89 Page - National Semiconductor (TI)

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