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DP83952 Datasheet(PDF) 68 Page - National Semiconductor (TI) |
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DP83952 Datasheet(HTML) 68 Page - National Semiconductor (TI) |
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68 / 90 page ![]() 80 RIC II Registers (Continued) INTER FRAME GAP THRESHOLD SELECT REGISTER (PAGE 0H ADDRESS 1FH) This register is used to configure the hub management interface to provide a certain minimum inter frame gap between packets transmitted over the management bus The value written to this register plus one is the magnitude in bit times of the minimum IFG allowed on the management bus D7 D6 D5 D4 D3 D2 D1 D0 IFGT7 IFGT6 IFGT5 IFGT4 IFGT3 IFGT2 IFGT1 IFGT0 PORT EVENT RECORD REGISTERS (PAGE 1H ADDRESS 11H TO 1DH) These registers hold the recorded events for the specified RIC II port The flags are cleared when the register is read D7 D6 D5 D4 D3 D2 D1 D0 BDLNK PART OWC SE NSFD PLER ELBER JAB Bit RW Symbol Description D0 R JAB JABBER A Jabber Protect event has occurred D1 R ELBER ELASTICITY BUFFER ERROR A Elasticity Buffer Error has occurred D2 R PLER PHASE LOCK ERROR A Phase Lock Error event has occurred D3 R NSFD NON-SFD A Non-SFD packet event has occurred D4 R SE SHORT EVENT A short event has occurred D5 R OWC OUT OF WINDOW COLLISION An out of window collision event has occurred D6 R PART PARTITION A partition event has occurred D7 R BDLNK BAD LINK A link failure event has occurred 68 |
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