DP83952 datasheet(67/90 Pages) NSC

67 / 90 page

80 RIC II Registers (Continued)

RIC II ADDRESS REGISTER (PAGE 0H ADDRESS 17H)

This register may be used to differentiate between RIC IIs in a multi-RIC II repeater system The contents of this register form

part of the information available through the management bus

res

PACKET COMPRESS DECODE REGISTER (PAGE 0H ADDRESS 18H)

This register is used to determine the number of bytes in the data field of a packet which are transferred over the management

bus when the packet compress option is employed The register bits perform the function of a direct binary decode Thus up to

255 bytes of data may be transferred over the management bus if packet compression is selected

PCD7

PCD6

PCD5

PCD4

PCD3

PCD2

PCD1

PCD0

GLOBAL SECURITY REGISTER (GSR) (PAGE 0H ADDRESS 1DH)

This register provides various security configuration options For instance enabling learning mode for all the ports starting

address comparison using the modified packet status register 5 for the management bus generating random pattern on source

address mismatch disabling port on source address mismatch

res

GLME

res

DSM

res

MPS

GRP

SAC

Bit

Symbol

Description

SAC

START ADDRESS COMPARISON

0 Do not begin comparision

1 Begin comparison

GRP

GENERATE RANDOM PATTERN

This bit controls generating the random pattern on a valid source

address mismatch In any event the Hub Manager will be informed on the SA mismatch

0 Generate the random pattern

1 Do not generate the random pattern

MPS

MODIFY PACKET STATUS REGISTER 5

This bit enables modifying the packet status register 5

PSR5 on the 7 management bytes over the management bus

0 Do not modify the PSR5

1 Modify the PSR5

res

RESERVED FOR FUTURE USE

For proper operation this bit must be 0

DSM

DISABLE THE PORT ON A SOURCE ADDRESS MISMATCH

0 Do not disable the port on a valid source address mismatch

1 Disable the port on a valid source address mismatch

res

RESERVED FOR FUTURE USE

GLME

GLOBAL LEARN MODE ENABLE

(Note)

0 Do not enable the learn mode for all ports

1 Enable the learn mode for all ports

res

RESERVED FOR FUTURE USE

Reads as a logic 0

Note

The GLME is not a status bit Reading this bit indicates what value was last written to it

DP83952 Datasheet(PDF) 67 Page - National Semiconductor (TI)

DP83952 Datasheet(HTML) 67 Page - National Semiconductor (TI)

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