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AD9530

Data Sheet

Rev. 0 | Page 38 of 41

Table 50. Bit Descriptions for PLL_LOCKDET_READBACK2 (Read Only; No Default Value)

Bits

Bit Name

Settings

Description

Default

Access

[7:5]

RESERVED

000b

When writing to Register 0x01F, these bits must be 000b.

000b

PLL_LOCK_DET_DONE

PLL lock detect measurement done.

Varies

PLL_LOCK_DET_RANGE

PLL lock detect error range.

Varies

The read back error is expressed in ppb (parts per billion).

The read back error is expressed in ppm (parts per million).

PLL_LOCKED

PLL lock detect status readback.

Varies

PLL unlocked.

PLL locked.

[1:0]

PLL_LOCK_DET_ERROR,

Bits[9:8]

PLL lock detect error, Bits[9:8]. These read only register bits, along

with Bits[7:0] Register 0x01E, form a 10-bit number that allows the

user to read back the magnitude of the frequency error at the phase

frequency detector. Bit 3 in Register 0x01F indicates whether the

phase error measurement is in parts per million (ppm) or parts per

billion (ppb).

Varies

M1, M2, M3 DIVIDERS (REGISTER 0x020 AND REGISTER 0x022)

Table 51. Bit Descriptions for M1_DIVIDER (Default 0x16)

Bits

Bit Name

Settings

Description

Default

Access

[7:5]

RESERVED

000b

When writing to Register 0x020, these bits must be 000b.

000b

[4:3]

M1_DIVIDER

These bits control the divide ratio for the M1 divider that feeds the

D1 and D2 dividers.

10b

Divide by 2.

Divide by 2.5.

Divide by 3 (default).

Divide by 3.5.

M1_LDO_EN

M1 divider enable LDO.

Disabled.

Enabled (default).

M1_EN

M1 divider enable.

Disabled.

Enabled (default).

M1_DIVIDER_RESET

Setting this (self clearing) bit resets the M1 divider. This bit is live,

meaning IO_UPDATE is not needed for it to take effect.

Table 52. Bit Descriptions for M2_DIVIDER (Default: 0x16)

Bits

Bit Name

Settings

Description

Default

Access

[7:5]

RESERVED

000b

When writing to Register 0x021, these bits must be 000b.

000b

[4:3]

M2_DIVIDER

These bits control the divide ratio for the M2 divider that feeds the

D3 and D4 dividers.

10b

Divide by 2.

Divide by 2.5.

Divide by 3 (default).

Divide by 3.5

M2_LDO_EN

M2 divider enable LDO.

Disabled.

Enabled (default).

M2_EN

M2 divider enable.

Disabled.

Enabled.

M2_DIVIDER_RESET

Setting this (self clearing) bit resets the M2 divider. This bit is live,

meaning IO_UPDATE is not needed for it to take effect.

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