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AD9530 Datasheet(PDF) 9 Page - Analog Devices |
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AD9530 Datasheet(HTML) 9 Page - Analog Devices |
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9 / 41 page  Data Sheet AD9530 Rev. 0 | Page 9 of 41 Parameter Min Typ Max Unit Test Conditions/Comments 900 mV All outputs are externally terminated with 50 Ω to VDD Output Frequency 5.725 2700 MHz Rise Time/Fall Time (20% to 80%) 53 70 ps Duty Cycle 47 53 % Any Mx divider, output divider ≠ 1 48 52 56 % Mx divider = 2, output divider = 1 43 51 60 % Mx divider = 2.5, output divider = 1 48 51 53 % Mx divider = 3, output divider = 1 Output Differential Voltage, Magnitude 660 930 1200 mV Voltage difference between the output pins; output driver is static; in normal operation, the peak-to-peak amplitude is approximately 2× this value if measured with a differential probe Common-Mode Output Voltage 1.83 2.03 2.23 V Measured with output driver static 1000 mV All outputs are externally terminated with 50 Ω to VDD Output Frequency 5.725 2700 MHz Rise Time/Fall Time (20% to 80%) 53 71 ps Duty Cycle 47 53 % Any Mx divider, output divider ≠ 1 47 52 56 % Mx divider = 2, output divider = 1 43 52 60 % Mx divider = 2.5, output divider = 1 48 51 53 % Mx divider = 3, output divider = 1 Output Differential Voltage, Magnitude 735 1025 1335 mV Voltage difference between the output pins; output driver is static; in normal operation, the peak-to-peak amplitude is approximately 2× this value if measured with a differential probe Common-Mode Output Voltage 1.83 2.03 2.23 V Measured with output driver static 1100 mV All outputs are externally terminated with 50 Ω to VDD Output Frequency 5.725 2700 MHz Rise Time/Fall Time (20% to 80%) 53 72 ps Duty Cycle 47 53 % Any Mx divider, output divider ≠ 1 47 52 56 % Mx divider = 2, output divider = 1 43 52 60 % Mx divider = 2.5, output divider = 1 48 51 54 % Mx divider = 3, output divider = 1 Output Differential Voltage, Magnitude 810 1125 1455 mV Voltage difference between the output pins; output driver is static; in normal operation, the peak-to-peak amplitude is approximately 2× this value if measured with a differential probe Common-Mode Output Voltage 1.71 1.93 2.23 V Measured with output driver static INTERNAL OUTPUT TERMINATION RESISTANCE 53.7 Ω Measured with output driver static CLOCK OUTPUT ABSOLUTE TIME JITTER (LOW LOOP BANDWIDTH) SPECIFICATIONS Table 9. Parameter Min Typ Max Unit Test Conditions/Comments CML OUTPUT ABSOLUTE TIME JITTER REFA enabled and ac-coupled; R divider = 1; Mx divider value varies; loop bandwidth = 8 kHz; output divider bypassed unless otherwise noted; single-ended output swing level = 1000 mV; no internal termination; VCO in high power mode, integration bandwidth = 12 kHz to 20 MHz fOUT = 2700 MHz 219 fs rms Reference frequency = 100 MHz, Mx divider = 2 fOUT = 2100 MHz 220 fs rms Reference frequency = 100 MHz, Mx divider = 2.5 fOUT = 2050 MHz 214 fs rms Reference frequency = 102.5 MHz, Mx divider = 2.5 fOUT = 1768 MHz 219 fs rms Reference frequency = 104 MHz, Mx divider = 3 fOUT = 1500 MHz 210 fs rms Reference frequency = 100 MHz, Mx divider = 3.5 fOUT = 100 MHz 232 fs rms Reference frequency = 100 MHz, Mx divider = 3, output divider (Dx divider) = 17 |
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