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LTC6948 Datasheet(PDF) 29 Page - Analog Devices |
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LTC6948 Datasheet(HTML) 29 Page - Analog Devices |
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29 / 38 page ![]() LTC6948 29 6948fa For more information www.linear.com/LTC6948 applicaTions inForMaTion R and N Divider and Numerator Programming Program registers Reg06 to Reg0A with the previously determinedRandNdividerandnumeratorvalues.Because the AUTORST and AUTOCAL bits were previously set to 1, CAL and RSTFN do not need to be set: Reg06 = h10 Reg07 = h4C Reg08 = h37 Reg09 = h6C Reg0A = h90 Reference Input Settings and Output Divider Programming From Table 1, FILT = 0 for a 100MHz reference frequency. Next, convert 7dBm into VP–P. For a CW tone, use the following equation with R = 50: VP-P ≅ R •10(dBm –21)/20 (15) This gives VP-P = 1.41V, and, according to Table 2, set BST = 1. Now program Reg0B, assuming maximum RF± output power(RFO[1:0]=3accordingtoTable14)andOD[2:0]=2: Reg0B = h9A Lock Detect and Charge Pump Current Programming Next,determinethelockindicatorwindowfromfPFD.From Table 3 we see that LKWIN[1:0] = 0 with a tLWW of 5ns for CPLE = 1 and fVCO = 3.843GHz. The LTC6948 will consider the loop locked as long as the phase coincidence at the PFD is within 90°, as calculated below. phase = 360° • tLWW • fPFD = 360 • 5n • 50M = 90° Choosing the correct COUNTS value depends upon the OSR.SmallerratiosdictatelargerCOUNTSvalues,although application requirements will vary. A COUNTS value of 32 will work for the OSR of 333. From Table 5, LKCT[1:0] = 1 for 32 counts. Using Table 6 with the previously selected ICP of 5.6mA gives CP[3:0] = 7. This gives enough information to pro- gram Reg0C: Reg0C = h0D Charge Pump Function Programming This example uses the additional voltage clamp features to allow the monitoring of fault conditions by setting CPCHI = 1 and CPCLO = 1. If something occurs and the system can no longer lock to its intended frequency, the charge pump output will move toward either GND or VCP+, thereby setting either the TLO or THI status flags, respectively. Disable all the other charge pump functions (CPMID, CPINV, CPRST, CPUP, and CPDN), allowing the loop to lock: Reg0D = hC0 The loop should now lock. Now un-mute the output by setting OMUTE = 0 (assumes the MUTE pin is high). Reg02 = h04 |
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