ISP1521 datasheet(43/53 Pages) PHILIPS

43 / 53 page

Philips Semiconductors

ISP1521

Hi-Speed USB hub controller

Product data

Rev. 03 — 24 November 2004

43 of 53

9397 750 13702

[1]

fSCL = 1⁄64 × fXTAL.

[2]

Rise time is determined by Cb and pull-up resistor value Rp (typical 4.7 kΩ).

Table 46:

Dynamic characteristics: I2C-bus (pins SDA and SCL)

VCC and Tamb within recommended operating range; VDD =5V; VSS =VGND ; VIL and VIH between VSS and VDD.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Clock frequency

fSCL

SCL clock frequency

fXTAL =12MHz

[1] 0

93.75

100

kHz

General timing

tLOW

SCL LOW time

4.7

µs

tHIGH

SCL HIGH time

4.0

µs

SCL and SDA rise time

[2] -

1000

SCL and SDA fall time

300

capacitive load for each bus line

400

SDA timing

tBUF

bus free time

4.7

µs

tSU;STA

set-up time for (repeated) START

condition

4.7

µs

tHD;STA

hold time (repeated) START condition

4.0

µs

tSU;DAT

data set-up time

250

tHD;DAT

data hold time

µs

tSU;STO

set-up time for STOP condition

4.0

µs

Additional I2C-bus timing

tVD;DAT

SCL LOW to data-out valid time

0.4

µs

Fig 16. I2C-bus timing.

004aaa485

tHD;STA

tBUF

tSU;STA

tSU;DAT

tHIGH

tLOW

tSU;STO

tHD;DAT

SDA

SCL

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