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IT8705F V0.4
vi
IT8705F
9.6.12.7
LOCK
........................................................................................................ 116
9.6.12.8
VERSION ........................................................................................................ 116
9.6.12.9
SENSE INTERRUPT STATUS......................................................................... 116
9.6.12.10
SENSE DRIVE STATUS .................................................................................. 117
9.6.12.11
SPECIFY ........................................................................................................ 117
9.6.12.12
PERPENDICULAR MODE ............................................................................... 118
9.6.12.13
INVALID
........................................................................................................ 118
9.6.13 DMA Transfers
........................................................................................................ 118
9.6.14 Low Power Mode
........................................................................................................ 119
9.7
Serial Port (UART) Register Description ..................................................................................... 119
9.7.1
Data Registers .................................................................................................................... 119
9.7.2
Control Registers: IER, IIR, FCR, DLL, DLM, LCR and MCR ............................................ 120
9.7.3
Status Registers: LSR and MSR ........................................................................................ 125
9.7.4
Reset................................................................................................................................... 128
9.7.5
Programming ...................................................................................................................... 128
9.7.6
Software Reset ................................................................................................................... 128
9.7.7
Clock Input Operation ......................................................................................................... 128
9.7.8
FIFO Interrupt Mode Operation .......................................................................................... 129
9.8
Parallel Port ................................................................................................................................. 130
9.8.1
SPP and EPP Modes.......................................................................................................... 131
9.8.2
EPP Mode Operation.......................................................................................................... 132
9.8.3
ECP Mode Operation.......................................................................................................... 133
9.9
Consumer Remote Control (TV Remote) IR (CIR) ...................................................................... 141
9.9.1
Overview ............................................................................................................................. 141
9.9.2
Features.............................................................................................................................. 141
9.9.3
Block Diagram .................................................................................................................... 141
9.9.4
Transmit Operation .............................................................................................................142
9.9.5
Receive Operation ..............................................................................................................142
9.9.6
Register Descriptions and Address .................................................................................... 142
9.9.6.1
CIR Data Register (DR) .................................................................................... 143
9.9.6.2
CIR Interrupt Enable Register (IER) ................................................................. 143
9.9.6.3
CIR Receiver Control Register (RCR) .............................................................. 144
9.9.6.4
CIR Transmitter Control Register 1 (TCR1) ..................................................... 145
9.9.6.5
CIR Transmitter Control Register 2 (TCR2) ..................................................... 146
9.9.6.6
CIR Baud Rate Divisor Low Byte Register (BDLR) .......................................... 149
9.9.6.7
CIR Baud Rate Divisor Register High Byte (BDHR)......................................... 149
9.9.6.8
CIR Transmitter Status Register (TSR) ............................................................ 149
9.9.6.9
CIR Receiver FIFO Status Register (RSR) ...................................................... 150
9.9.6.10
CIR Interrupt Identification Register (IIR) ......................................................... 150
9.10
Game Port Interface .................................................................................................................... 151
9.10.1 Game Port (Base+0h) ........................................................................................................ 151
9.11
FLASH ROM Interface................................................................................................................. 152
9.12
MIDI Interface .............................................................................................................................. 153
9.12.1 MPU-401 Register Interface ............................................................................................... 153
9.12.2 Operation
........................................................................................................ 154
10. DC Electrical Characteristics...................................................................................................................... 155
11. AC Characteristics (Vcc = 5.0V
± 5%, Ta = 0°C to + 70°C).......................................................................157
11.1
Clock Input Timings ..................................................................................................................... 157
11.2
LCLK (PCICLK) and LRESET# ................................................................................................... 157
11.3
LPC and SERIRQ Timings .......................................................................................................... 158
11.4
Serial Port, ASKIR, SIR and Consumer Remote Control Timings .............................................. 159
11.5
Modem Control Timings............................................................................................................... 160
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