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IT8705F V0.4
2
IT8705F
Section
Revision
Page No.
• Added the following three sections:
8.9.16 Flash ROM I/F Special Write Mask Based Address MSB Register
(Index=D8h, Default=00h)
8.9.17 Flash ROM I/F Special Write Mask Based Address LSB Register
(Index=D9h, Default=00h)
8.9.18 Flash ROM I/F Special Write Mask Size Control Register
(Index=DAh, Default=00h)
57
• In section 8.9.22, the description of bit 7-6 was revised.
59
• Section 8.9.30 VID Input Register and section 8.9.31 VID Output Register
were revised.
61
9
• In Table 9-2. Environment Controller Registers, the Registers or Action for
index 0Ah, 0Ch, 18h, 19h, 1Ah, 1Bh, 1Ch, 1Dh, 48h, 56h, 57h, 61h –64h,
69h, 6Ah-6Ch, and 71h-74h were revised.
77-79
• Added section 9.5.3.2.11 Reserved Register (Index=0Ah).
81
• Added section 9.5.3.2.13 Fan Tachometer 16-bit Counter Enable
Register.
82
• In section 9.5.3.2.16Fan Controller Main Control Register, the
descriptions of pin 6-4 and 3 were revised.
82
• In section 9.5.3.2.17FAN_CTL Control Register, the descriptions of pin 6-
4 and 3 were revised.
83
• Added the following eight sections:
9.5.3.2.21Fan Tachometer 1-3 Extended Reading Registers
9.5.3.2.22Fan Tachometer 1-3 Extended Limit Registers
9.5.3.2.32 Thermal Diode Zero Degree Adjust 1 Register
9.5.3.2.33 Thermal Diode Zero Degree Adjust 2 Register and Code ID
Register
9.5.3.2.42FAN_CTL3-1 SmartGuardian Automatic Mode Temperature Limit
of Fan Start Registers
9.5.3.2.43FAN_CTL3-1 SmartGuardian Automatic Mode Temperature Limit
of Full Speed Registers
9.5.3.2.44FAN_CTL3-1 SmartGuardian Automatic Mode Start PWM
Registers
9.5.3.2.45FAN_CTL3-1 SmartGuardian Automatic Mode Control Registers
84-88
• In section 9.5.4.5 Fan Tachometer, the content was revised to “The Fan
Tachometer inputs gate a 22.5 kHz clock into an 8-bit or a 16-bit counter
(maximum count=255 or 65535) for one period of the input signals.’’
90
• In section 9.5.4.7FAN Controller FAN_CTL’s ON-OFF and
SmartGuardian Modes, the last paragraph was revised.
92
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