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C161 Datasheet(PDF) 197 Page - Infineon Technologies AG |
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C161 Datasheet(HTML) 197 Page - Infineon Technologies AG |
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197 / 400 page  &3, 7KH*HQHUDO 3XUSRVH 7LPHU8QLWV User’s Manual 10-5 1999-08 Timer 3 Output Toggle Latch An overflow or underflow of timer T3 will clock the toggle bit T3OTL in control register T3CON. T3OTL can also be set or reset by software. Bit T3OE (Alternate Output Function Enable) in register T3CON enables the state of T3OTL to be an alternate function of the external output pin T3OUT. For that purpose, a ‘1’ must be written into the respective port data latch and pin T3OUT must be configured as output by setting the corresponding direction control bit to ‘1’. If T3OE=‘1’, pin T3OUT then outputs the state of T3OTL. If T3OE=‘0’, pin T3OUT can be used as general purpose IO pin. In addition, T3OTL can be used in conjunction with the timer over/underflows as an input for the counter function or as a trigger source for the reload function of the auxiliary timers T2 and T4. For this purpose, the state of T3OTL does not have to be available at pin T3OUT, because an internal connection is provided for this option. Timer 3 in Timer Mode Timer mode for the core timer T3 is selected by setting bit field T3M in register T3CON to ‘000 B’. In this mode, T3 is clocked with the internal system clock (CPU clock) divided by a programmable prescaler, which is selected by bit field T3I. The input frequency f T3 for timer T3 and its resolution r T3 are scaled linearly with lower clock frequencies fCPU, as can be seen from the following formula: Figure 10-3 Block Diagram of Core Timer T3 in Timer Mode f T3 = f CPU 8 * 2 <T3I> r T3 [µs] = f CPU [MHz] 8 * 2 <T3I> Core Timer Tx TxOTL Interrupt Request TxOE TxOUT TxR 2n : 1 Txl EXOR 0 MUX 1 Up/ Down TxEUD TxUDE MCB02028 TxUD f CPU T3EUD = P3.4 T3OUT = P3.3 x = 3 |
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