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C161 Datasheet(PDF) 199 Page - Infineon Technologies AG

Part # C161
Description  16-Bit Single-Chip Microcontroller
PDF  400 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

C161 Datasheet(HTML) 199 Page - Infineon Technologies AG

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User’s Manual
10-7
1999-08
Timer 3 in Gated Timer Mode
Gated timer mode for the core timer T3 is selected by setting bit field T3M in register
T3CON to ‘010
B’ or ‘011B’. Bit T3M.0 (T3CON.3) selects the active level of the gate input.
In gated timer mode the same options for the input frequency as for the timer mode are
available. However, the input clock to the timer in this mode is gated by the external input
pin T3IN (Timer T3 External Input).
To enable this operation pin T3IN must be configured as input, i.e. the corresponding
direction control bit must contain ‘0’.
Figure 10-4
Block Diagram of Core Timer T3 in Gated Timer Mode
If T3M.0=‘0’, the timer is enabled when T3IN shows a low level. A high level at this pin
stops the timer. If T3M.0=‘1’, pin T3IN must have a high level in order to enable the timer.
In addition, the timer can be turned on or off by software using bit T3R. The timer will only
run, if T3R=‘1’ and the gate is active. It will stop, if either T3R=‘0’ or the gate is inactive.
Note: A transition of the gate signal at pin T3IN does not cause an interrupt request.
Core Timer Tx
TxOTL
Interrupt
Request
TxOE
TxOUT
TxR
MUX
XOR
0
MUX
1
Up/
Down
TxEUD
TxUDE
MCB02029
TxUD
2n : 1
TxI
f
CPU
TxM
TxIN
T3IN
= P3.6
T3EUD
= P3.4
T3OUT
= P3.3
x = 3



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