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AX58200 Datasheet(PDF) 149 Page - ASIX Electronics Corporation

Part # AX58200
Description  EtherCAT Slave Controller SoC
PDF  180 Pages
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Manufacturer  ASIX [ASIX Electronics Corporation]
Direct Link  http://www.asix.com.tw
Logo ASIX - ASIX Electronics Corporation

AX58200 Datasheet(HTML) 149 Page - ASIX Electronics Corporation

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Copyright © 2019 ASIX Electronics Corporation. All rights reserved.
AX58200
EtherCAT Slave Controller SoC
3.11.4 USCI - I2C Dynamic Characteristics
Symbol
Parameter
Standard Mode
[1][2]
Fast Mode
[1][2]
Unit
Min.
Max.
Min.
Max.
tLOW
SCL low period
4.7
-
1.2
-
uS
tHIGH
SCL high period
4
-
0.6
-
uS
tSU; STA
Repeated START condition setup time
4.7
-
1.2
-
uS
tHD; STA
START condition hold time
4
-
0.6
-
uS
tSU; STO
STOP condition setup time
4
-
0.6
-
uS
tBUF
Bus free time
4.7
[3]
-
1.2
[3]
-
uS
tSU;DAT
Data setup time
250
-
100
-
nS
tHD;DAT
Data hold time
0
[4]
3.45
[5]
0
[4]
0.8
[5]
uS
tr
SCL/SDA rise time
-
1000
20+0.1Cb
300
nS
tf
SCL/SDA fall time
-
300
-
300
nS
Cb
Capacitive load for each bus line
-
400
-
400
pF
Note:
1.
Guaranteed by characteristic, not tested in production
2.
HCLK must be higher than 2 MHz to achieve the maximum standard mode I2C frequency. It must
be higher than 8 MHz to achieve the maximum fast mode I2C frequency.
3.
I2C controller must be retriggered immediately at slave mode after receiving STOP condition.
4.
The device must internally provide a hold time of at least 300 ns for the SDA signal in order to
bridge the undefined region of the falling edge of SCL.
5.
The maximum hold time of the Start condition has only to be met if the interface does not stretch
the low period of SCL signal.
tBUF
STOP
SDA
SCL
START
tHD;STA
tLOW
tHD;DAT
tHIGH
tf
tSU;DAT
Repeated
START
tSU;STA
tSU;STO
STOP
tr
Figure 3.11-6 I2C Timing Diagram



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