AX58200 datasheet(151/180 Pages) ASIX

151 / 180 page

151

AX58200

EtherCAT Slave Controller SoC

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

SPI SLAVE MODE (VDD = 3.0~3.6V, 30 PF LOADING CAPACITOR)

tCLKH

Clock output High time [*1]

TSPICLK / 2

tCLKL

Clock output Low time [*1]

TSPICLK / 2

tSS

Slave select setup time

1 TSPICLK + 2ns

tSH

Slave select hold time

1 TSPICLK

tDS

Data input setup time

tDH

Data input hold time

Data output valid time

tCLKH

Clock output High time [*1]

TSPICLK / 2

SPI SLAVE MODE (VDD = 1.8 V ~ 2.0 V, 30 PF LOADING CAPACITOR)

tCLKH

Clock output High time [*1]

TSPICLK / 2

tCLKL

Clock output Low time [*1]

TSPICLK / 2

tSS

Slave select setup time

1 TSPICLK + 3ns

tSH

Slave select hold time

1 TSPICLK

tDS

Data input setup time

tDH

Data input hold time

Data output valid time

Note:

The minimum clock period for SPICLK is 10.4 ns (96 MHz).

AX58200 Datasheet(PDF) 151 Page - ASIX Electronics Corporation

AX58200 Datasheet(HTML) 151 Page - ASIX Electronics Corporation

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