DS3172 datasheet(146/232 Pages) DALLAS

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DS3171/DS3172/DS3173/DS3174

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12.4 BERT

12.4.1 BERT Register Map

The BERT utilizes twelve registers.

Note: The BERT Registers will be cleared when GL.CR1.RSTDP or PORT.CR1.RSTDP or PORT.CR1.PD is set.

Table 12-14. BERT Register Map

Address

(0,2,4,6)60h BERT.CR

BERT Control Register

(0,2,4,6)62h BERT.PCR

BERT Pattern Configuration Register

(0,2,4,6)64h BERT.SPR1

BERT Seed/Pattern Register #1

(0,2,4,6)66h BERT.SPR2

BERT Seed/Pattern Register #2

(0,2,4,6)68h BERT.TEICR

BERT Transmit Error Insertion Control Register

(0,2,4,6)6Ah --

Unused

(0,2,4,6)6Ch BERT.SR

BERT Status Register

(0,2,4,6)6Eh BERT.SRL

BERT Status Register Latched

(0,2,4,6)70h BERT.SRIE

BERT Status Register Interrupt Enable

(0,2,4,6)72h --

Unused

(0,2,4,6)74h BERT.RBECR1

BERT Receive Bit Error Count Register #1

(0,2,4,6)76h BERT.RBECR2

BERT Receive Bit Error Count Register #2

(0,2,4,6)78h BERT.RBCR1

BERT Receive Bit Count Register #1

(0,2,4,6)7Ah BERT.RBCR2

BERT Receive Bit Count Register #2

(0,2,4,6)7Ch --

Unused

(0,2,4,6)7Eh --

Unused

12.4.2 BERT Register Bit Descriptions

BERT.CR

BERT Control Register

(0,2,4,6)60h

Bit #

Name

Default

Bit #

Name

PMUM

LPMU

RNPL

RPIC

MPR

APRD

TNPL

TPIC

Default

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