DS3172 datasheet(152/232 Pages) DALLAS

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DS3171/DS3172/DS3173/DS3174

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BERT.RBECR2

BERT Receive Bit Error Count Register #2

(0,2,4,6)76h

Bit #

Name

Default

Bit #

Name

BEC23

BEC22

BEC21

BEC20

BEC19

BEC18

BEC17

BEC16

Default

Bits 7 to 0: Bit Error Count (BEC[23:16]) - Upper 8-bits of Register.

Bit Error Count (BEC[23:0]) – These twenty-four bits indicate the number of bit errors detected in the incoming

data stream. This count stops incrementing when it reaches a count of FF FFFFh. This bit error counter will not

increment when an OOS condition exists. This register is updated via the PMU signal (see Section 10.4.5).

BERT.RBCR1

Receive Bit Count Register #1

(0,2,4,6)78h

Bit #

Name

BC15

BC14

BC13

BC12

BC11

BC10

BC9

BC8

Default

Bit #

Name

BC7

BC6

BC5

BC4

BC3

BC2

BC1

BC0

Default

Bits 15 to 0: Bit Count (BC[15:0]) – Lower sixteen bits of 32 bits. Register description follows next register.

BERT.RBCR2

Receive Bit Count Register #2

(0,2,4,6)7Ah

Bit #

Name

BC31

BC30

BC29

BC28

BC27

BC26

BC25

BC24

Default

Bit #

Name

BC23

BC22

BC21

BC20

BC19

BC18

BC17

BC16

Default

Bits 15 to 0: Bit Count (BC[31:16]) - Upper 16 bits of 32 bits.

Bit Count (BC[31:0]) – These thirty-two bits indicate the number of bits in the incoming data stream. This count

stops incrementing when it reaches a count of FFFF FFFFh. This bit counter will not increment when an OOS

condition exists. This register is updated via the PMU signal (see Section 10.4.5).

DS3172 Datasheet(PDF) 152 Page - Dallas Semiconductor

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