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GS12281 Datasheet(PDF) 48 Page - Semtech Corporation

Part # GS12281
Description  12G UHD-SDI Re-timing Cable Driver
PDF  97 Pages
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

GS12281 Datasheet(HTML) 48 Page - Semtech Corporation

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GS12281
Final Data Sheet
Rev.9
PDS-061385
February 2019
48 of 97
Semtech
Proprietary & Confidential
www.semtech.com
Figure 4-13: Command and Data Word Format
Figure 4-14: Command Word 1 and Command Word 2 Details
Note: Please see Section 4.9.5.6 ADDRESS—B6:B0 Command Word 1 and B15:B0
Command Word 2 for an example of the command word structure.
4.9.6 GSPI Transaction Timing
Figure 4-15: GSPI External Interface Timing
MSB
LSB
R / W
EMEM
AUTOINC
UA0
UA1
UA2
UA4
UA3
Command Words
UNIT ADDRESS
ADDRESS[22:16]
B’CAST
ALL
D15
D14
D13
D12
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D11
D10
Data Word
ADDRESS[15:0]
A16
A17
A18
A19
A20
A21
A22
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
Command Word 1
Command Word 2
23-bit CSR address field.
5-bit UNIT ADDRESS field providing up to
32 devices to be connected on a single CS.
Auto increment read/write access when set.
Single read write access when reset.
Extended memory mode. When set, the extended memory mode is
enabled. When reset, normal GSPI addressing is enabled.
Read access when this bit is set.
Write access when this bit is reset.
When set, the UNIT ADDRESS field is ignored and
all data accesses are actioned by the device.
When reset, the Unit Address is used to
manage data accesses in the device.
MSB
LSB
R / W
EMEM
AUTOINC
UA0
UA1
UA2
UA4
UA3
UNIT ADDRESS
ADDRESS[22:16]
B’CAST
ALL
A16
A17
A18
A19
A20
A21
A22
ADDRESS[15:0]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
X
t
cmd_GSPI_config
t
cmd
t
9
SCLK
SDOUT
SDIN
X
CS
Write Mode
SDIN signal is looped out on SDOUT
A4
A3
A2
A1
A0
Read Mode
SDIN signal is looped out on SDOUT
A4
A3
A2
A1
A0
Read Data is output on SDOUT
D0
A4
A3
A2
A1
A0
D15
D14
D13
D12
D11
D10
D9
D8
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D15
D14
D13
D12
D11
D10
D9
D8
SCLK
CSb
t
0
t
8
t
2
t
3
t
1
t
9
t
6
t
5
t
7
t
4
R/W
BCST
SDIN
EMEM
Auto_Inc
UA4
UA3
UA2
UA1
UA0
A6
A5
R/W
BCST
SDOUT
EMEM
Auto_Inc
UA4
UA3
UA2
UA1
UA0
A6
A5
A6
A5
A6
A5
RSV
EMEM
Auto_Inc
RSV
EMEM
Auto_Inc
UA4
UA3
UA2
UA1
UA0
UA4
UA3
UA2
UA1
UA0
SCLK
CSb
SDOUT
SDIN
A11
A10
A9
A8
A7
A11
A10
A9
A8
A7
A13
A12
A13
A12
A18
A17
A16
A15
A14
A18
A17
A16
A15
A14
A20
A19
A20
A19
A22
A21
A22
A21
A11
A10
A9
A8
A7
A11
A10
A9
A8
A7
A13
A12
A13
A12
A18
A17
A16
A15
A14
A18
A17
A16
A15
A14
A20
A19
A20
A19
A22
A21
A22
A21
R/W
R/W



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