FXLS8964AF datasheet(27/98 Pages) NXP

27 / 98 page

NXP Semiconductors

FXLS8964AF

3-Axis Low-g Accelerometer

FXLS8964AF

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Objective data sheet

Rev. 2 — 30 October 2020

27 / 98

Mode

I2C/SPI

bus state

VDD

Description

Active (WAKE/

SLEEP)

Available

≥ 1.71V

Sensor and analog blocks are enabled when needed (power cycled).

I2C and SPI interfaces are available.

BT_MODE = GND:

FXLS8964AF can automatically transition between the Active SLEEP

and WAKE sub-modes when activity/inactivity is detected. The Auto-

WAKE/SLEEP mode is enabled by setting

ASLP_COUNT ≥ 1.

BT_MODE = VDD:

The Auto-WAKE/SLEEP function is not typically used in this mode

(defaults to disabled), but the host may enable Auto-WAKE/SLEEP by

configuring it through the register interface.

Active (EXT_TRIG)

Available

≥ 1.71V

All blocks are enabled when needed (power cycled). I2C and SPI

interfaces are able to respond to read and write commands.

BT_MODE = GND:

SENS_CONFIG4[INT2_FUNC] = 1

FXLS8964AF automatically transitions between EXT_TRIG and Active

mode upon receiving a trigger signal (low-to-high transition) on the

EXT_TRIG/INT2 pin. Once the measurement cycle has completed, F

XLS8964AF automatically transitions back to the EXT_TRIG state and

waits for the next trigger event.

BT_MODE = VDD:

External trigger mode is not available;

SENS_CONFIG4 [INT2_FUNC

] shall not be written to with any value other than 0.

Notes:

• All register contents are preserved when transitioning from Active to Standby mode.

Some registers are reset when transitioning from Standby to Active. The behavior of all

registers is noted in Table 19.

• Exiting Hibernate mode will cause all register settings to initialize to their default

values. Entering Hibernate mode is equivalent to removing the VDD supply; the device

state, sensor data, and host programmed register contents are lost when this mode is

entered.

• The SLEEP and WAKE modes are Active measurement modes. For more information

on how to use the SLEEP and WAKE modes and how to transition between these

modes, refer to the functionality section of this document.

• The SLEEP and WAKE modes each feature independent power modes and ODR

settings for the HPM and LPM modes. FPM may also be independently enabled

for either WAKE or SLEEP modes, allowing for user programmable idle times and

measurement decimation factors. This allows for the creation of custom ODRs and also

realizing the optimal trade-off between resolution (noise) and power dissipation in a

given application or use-case.

• The EXT_TRIG mode may be used to synchronize the collection of acceleration and

temperature data with an external system, or to create custom ODRs using a MCU

output compare/PWM/GPIO pin.

FXLS8964AF Datasheet(PDF) 27 Page - NXP Semiconductors

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