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FXLS8964AF Datasheet(PDF) 43 Page - NXP Semiconductors

Part # FXLS8964AF
Description  3-Axis Low-g Accelerometer
PDF  98 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXLS8964AF Datasheet(HTML) 43 Page - NXP Semiconductors

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NXP Semiconductors
FXLS8964AF
3-Axis Low-g Accelerometer
FXLS8964AF
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Objective data sheet
Rev. 2 — 30 October 2020
43 / 98
Bit
7
6
5
4
3
2
1
0
Name
OUT_Y[3:0]
0
0
0
0
Reset
—
—
—
—
—
—
—
—
Access
R
R
R
R
R
R
R
R
Table 32. OUT_Z_LSB and OUT_Z_MSB register (addresses 08h to 09h) with SEN_CONFIG2[LE_BE] = 1 bit
allocation
Bit
7
6
5
4
3
2
1
0
Name
OUT_Z[11:4]
Reset
—
—
—
—
—
—
—
—
Access
R
R
R
R
R
R
R
R
Bit
7
6
5
4
3
2
1
0
Name
OUT_Z[3:0]
0
0
0
0
Reset
—
—
—
—
—
—
—
—
Access
R
R
R
R
R
R
R
R
13.6 BUF_STATUS register (address 0Bh)
The content stored at this register address depends on whether the output data buffer is
enabled or not. When
BUF_CONFIG1[BUF_MODE[1:0]] = 00b, the output data buffer is
disabled and this register always contains the value 00h.
When
BUF_CONFIG1[BUF_MODE[1:0]] > 00b, the BUF_STATUS register content
reflects the following:
Table 33. BUF_STATUS register (address 0Bh) bit allocation
Bit
7
6
5
4
3
2
1
0
Name
BUF_
WMRK
BUF_OVF
BUF_CNT[5:0]
Reset
0
0
0
0
0
0
0
0
Access
R
R
R
R
R
R
R
R



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