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FXLS8964AF Datasheet(PDF) 34 Page - NXP Semiconductors |
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FXLS8964AF Datasheet(HTML) 34 Page - NXP Semiconductors |
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34 / 98 page  NXP Semiconductors FXLS8964AF 3-Axis Low-g Accelerometer FXLS8964AF All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Objective data sheet Rev. 2 — 30 October 2020 34 / 98 Auto-increment Address Name Type Register Address F_READ = 0 F_READ = 1 Default Values BT_MODE = GND/[VDD] Comment OUT_Z_MSB [1] [3] R 09h 00h — MSB/LSB of current 12-bit Z-axis accelerometer output data – z_data_out[11:8] when SENS_CONFIG2[LE_BE] = 0 and z_data_out[3:0] when SENS_ CONFIG2[LE_BE] = 1. When SENS_ CONFIG5[Z_DIS] = 1, this register is skipped over by the auto-increment mechanism. Reserved registers RESERVED_REG1 — 0Ah 0Bh 00h Factory reserved register address 1 Output Buffer Configuration and Status BUF_STATUS[1][2] R 0Bh 0Ch/0Eh/10h 00h Buffer watermark and overflow status flags; stored sample count (buf_cnt[5:0]) BUF_X_LSB[1][3][4] R 0Ch 0Dh 0Eh/10h/0Ch — Head/Tail sample of output buffer X-axis LSB - buf_x_out[7:0] when SENS_CONFIG2[LE_BE ] = 0 and buf_x_out[11:4] when SENS_ CONFIG2[LE_BE] = 1. When SENS_ CONFIG5[X_DIS] = 1, this register is skipped over by the auto-increment mechanism. BUF_X_MSB[1][3][4] R 0Dh 0Eh/10h/0Ch — Head/Tail sample of output buffer X-axis MSB - buf_x_out[11:8] when SENS_ CONFIG2[LE_BE] = 0 and buf_x_out[3:0] when SENS_CONFIG2[ LE_BE] = 1. When SENS_CONFIG5[X_DIS] = 1, this register is skipped over by the auto-increment mechanism. BUF _Y_LSB[1][3][4] R 0Eh 0Fh 10h/0Ch/0Eh — Head/Tail sample of output buffer Y-axis LSB - buf_y_out[7:0] when SENS_CONFIG2[LE_BE ] = 0 and buf_y_out[11:4] when SENS_ CONFIG2[ LE_BE] = 1. When SENS_ CONFIG5[Y_DIS] = 1, this register is skipped over by the auto-increment mechanism. BUF _Y_MSB[1][3][4] R 0Fh 10h/0Ch/0Eh — Head/Tail sample of output buffer Y-axis MSB - buf_Y_out[11:8] when SENS_ CONFIG2[LE_BE] = 0 and buf_y_out[3:0] when SENS_CONFIG2[LE_BE] = 1. When SENS_CONFIG5[Y_DIS] = 1, this register is skipped over by the auto-increment mechanism. BUF_Z_LSB[1][3][4] R 10h 11h 0Ch/0Eh/10h — Head/Tail sample of output buffer Z-axis LSB - buf_z_out[7:0] when SENS_CONFIG2[LE_BE ] = 0 and buf_z_out[11:4] when SENS_ CONFIG2[LE_BE] = 1. When SENS_ CONFIG5[Z_DIS] = 1, this register is skipped over by the auto-increment mechanism. BUF_Z_MSB[1][3][4] R 11h 0Ch/0Eh/10h — Head/Tail sample of output buffer Z-axis MSB - buf_Z_out[11:8] when SENS_ CONFIG2[LE_BE] = 0 and buf_z_out[3:0] when SENS_CONFIG2[LE_BE] = 1. When SENS_CONFIG5[Z_DIS] = 1, this register is skipped over by the auto-increment mechanism. Device identification PROD_REV R 12h 13h 13h Product revision number in BCD format [maj.min] with range 1.0 to 9.9 WHO_AM_I[1] R 13h 14h 84h 8-bit NXP unique sensor product ID. System status register SYS_MODE [1] [2] R 14h 15h 00h/[01h] Current system operating mode, buffer gate error flag, and buffer gate error sample count Device configuration and control registers |
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