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FXLS8964AF Datasheet(PDF) 38 Page - NXP Semiconductors |
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FXLS8964AF Datasheet(HTML) 38 Page - NXP Semiconductors |
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38 / 98 page ![]() NXP Semiconductors FXLS8964AF 3-Axis Low-g Accelerometer FXLS8964AF All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Objective data sheet Rev. 2 — 30 October 2020 38 / 98 Field Description 4 SRC_SDCD_OT SDCD outside of thresholds condition event flag (copy of SDCD_INT_SRC1[OT_EA] flag) 0: No SDCD outside of thresholds event has been detected ( SDCD_INT_SRC1[OT_EA] = 0). 1: An SDCD outside of thresholds event has been detected ( SDCD_INT_SRC1[OT_EA] = 1). The SRC_SDCD_OT event flag is cleared by reading the SDCD_INT_SRC1 register when SDCD_ CONFIG1[OT_ELE] = 1, otherwise this flag is cleared automatically by the function when the event condition becomes false. 3 SRC_SDCD_WT SDCD within thresholds condition event flag (copy of SDCD_INT_SRC2[WT_EA] flag) 0: No SDCD within thresholds event has been detected ( SDCD_INT_SRC2[WT_EA] = 0). 1: An SDCD within thresholds event has been detected ( SDCD_INT_SRC2[WT_EA] = 1). The SRC_SDCD_WT event flag is cleared by reading the SDCD_INT_SRC2 register when SDCD_ CONFIG1[WT_ELE] = 1, otherwise this flag is cleared automatically by the function when the event condition becomes false. 2 SRC_ORIENT Orientation change event flag The SRC_ORIENT flag is asserted whenever the ORIENT_STATUS[NEW_ORIENT] bit is asserted and a change in orientation has been detected. Reading the ORIENT_STATUS register clears this event flag. 0: An orientation change event has not occurred 1: An orientation change event has occurred. 1 SRC_ASLP Auto-WAKE/SLEEP event status flag 0: A WAKE-to-SLEEP or SLEEP-to-WAKE system operating mode transition has not occurred. 1: A WAKE-to-SLEEP or a SLEEP-to-WAKE system operating mode transition has occurred. Reading the SYS_MODE register allows the host processor to determine if the transition direction was from WAKE-to-SLEEP or SLEEP-to-WAKE: • A WAKE-to-SLEEP transition is observed when no configured interrupt event occurs for a time period (number of ODR periods) that equals the user-specified inactivity time limit programmed in the ASLP_COUNT_LSB and ASLP_COUNT_MSB registers. This causes the system to transition to the user-specified SLEEP power mode ( SENS_CONFIG2[sleep_pm]) and ODR (or decimation and idle time settings when Flexible Performance mode is selected). • A SLEEP-to-WAKE transition occurs when a configured interrupt event flag becomes active. This causes the system to transition to the user-specified WAKE power mode ( SENS_ CONFIG2[wake_pm]) and ODR (or decimation and idle time settings when Flexible Performance mode is selected). Notes: • The SRC_ASLP event flag is cleared by reading the SYS_MODE register. • The SRC_ASLP event flag is enabled when ASLP_COUNT ≥ 1 which also enables the Auto- WAKE/SLEEP function. The SRC_ASLP flag is only operational when INT_EN[ALSP_EN] = 1. |
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