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VR4102 Datasheet(PDF) 264 Page - NEC |
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VR4102 Datasheet(HTML) 264 Page - NEC |
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264 / 701 page  CHAPTER 10 BCU (BUS CONTROL UNIT) 264 10.5.4 DRAM Access (EDO Type) The access time is constant for DRAM. Figure 10-18. 4-byte Access to DRAM (16-bit Mode) TClock(Internal) MRAS[3:0]# UCAS#/LCAS# ADD[18:9] RD#/WR# DATA[15:0] (Read) Row Col. Col. Data0 DATA[15:0] (Write) Data0 Data1 Data1 ADD[25:19]/ ADD[8:0] Row Remark The dotted lines indicate high impedance. Figure 10-19. 8-byte Access to DRAM (32-bit Mode) TClock(Internal) MRAS[1:0]# UUCAS#/ULCAS#/ UCAS#/LCAS# ADD[18:9] RD#/WR# DATA[31:0] (Read) Row Col. Col. Data0 DATA[31:0] (Write) Data0 Data1 Data1 ADD[25:19]/ ADD[8:0] Row Remark The dotted lines indicate high impedance. |
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