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VR4102 Datasheet(PDF) 314 Page - NEC |
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VR4102 Datasheet(HTML) 314 Page - NEC |
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314 / 701 page  CHAPTER 14 ICU (INTERRUPT CONTROL UNIT) 314 14.2.18 MSYSINT2REG (0x0B00 0206) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved R/W R RR RRR R R RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit D7 D6D5 D4D3D2 D1 D0 Name Reserved Reserved DSIUINTR FIRINTR TCLKINTR HSPINTR LEDINTR RTCL2INTR R/W R R R/W R/W R/W R/W R/W R/W RTCRST 0 0 0 0 0 0 0 0 Other resets 0 0 0 0 0 0 0 0 Bit Name Function D[15..6] Reserved Write 0 when writing. 0 is returned after a read. D[5] DSIUINTR DSIU interrupt enable 1 : Enable 0 : Prohibit D[4] FIRINTR FIR interrupt enable 1 : Enable 0 : Prohibit D[3] TCLKINTR TClock counter interrupt enable 1 : Enable 0 : Prohibit D[2] HSPINTR HSP interrupt enable 1 : Enable 0 : Prohibit D[1] LEDINTR LED interrupt enable 1 : Enable 0 : Prohibit D[0] RTCL2INTR RTCLong2 timer interrupt enable 1 : Enable 0 : Prohibit This register is used to mask various interrupts in the VR4102 system. |
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