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VR4102 Datasheet(PDF) 361 Page - NEC |
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VR4102 Datasheet(HTML) 361 Page - NEC |
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361 / 701 page ![]() 361 CHAPTER 18 GIU (GENERAL PURPOSE I/O UNIT) This chapter describes the GIU’s operations and register settings. 18.1 GENERAL The GIU controls GPIO and DCD# pins. GPIO pins are ports that support output functions and input functions (including three types of interrupt trigger detection functions). The interrupts occur in response to an input signal change (rising edge or falling edge of signal), low level, or high level. The clocks and input buffer types used for interrupt detection at a GPIO pin are listed below. When not used for an interrupt, the registers corresponding to these pins can be written to output a low-level or high-level signal. Each register can be read to check the state of the signal currently being input to the corresponding pin. Table 18-1. GPIO Pin Functions Pin Interrupt detection clock (internal) Input buffer type Output clock (internal) GPIO[49..32] ð ð TClock GPIO[31..16] TClock Normal TClock GPIO[15](DCD#) MasterOut Normal ð GPIO[14..9] MasterOut Normal MasterOut GPIO[8..5] TClock Normal MasterOut GPIO[4] TClock Schmitt TClock GPIO[3..0] RTC Schmitt RTC Cautions The function of GPIO[15] is fixed as DCD# input signal. This pin cannot be used as a general-purpose input/output pin. |
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