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VR4102 Datasheet(PDF) 665 Page - NEC

Part # VR4102
Description  64/32-bit Microprocessor
PDF  701 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 665 Page - NEC

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CHAPTER 27 CPU INSTRUCTION SET DETAILS
665
TLBWR
Write Random TLB Entry
TLBWR
0
0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
COP0
0 1 0 0 0 0
TLBWR
0 0 0 1 1 0
31
26 25
6 5
0
619
6
CO
1
1
24
Format:
TLBWR
Description:
The TLB entry pointed at by the contents of the TLB Random register is loaded with the contents of the EntryHi
and EntryLo registers.
The
G bit of the TLB is written with the logical AND of the G bits in the EntryLo0 and EntryLo1 registers.
Operation:
32, 64 T:
TLB [Random5...0] <-
PageMask || (EntryHi and not PageMask) || EntryLo1 || EntryLo0
Exceptions:
Coprocessor unusable exception



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