VR4102 datasheet(122/701 Pages) NEC

122 / 701 page

CHAPTER 5 MEMORY MANAGEMENT SYSTEM

122

Figure 5-4. User Mode Address Space

64-bit mode

32-bit mode

Note

0x8000 0000

0xFFFF FFFF

Address error

0x0000 0100 0000 0000

0xFFFF FFFF FFFF FFFF

Address error

xuseg

useg

0x0000 0000

0x7FFF FFFF

2 Gbytes with

TLB mapping

0x0000 0000 0000 0000

0x0000 00FF FFFF FFFF

1 Tbyte with

TLB mapping

Note

The VR4102 uses 64-bit addresses within it. When the processor is running in Kernel mode, it saves

the contents of each register or restores their previous contents to initialize them before switching the

context. For 32-bit mode addressing, bit 31 is sign-extended to bits 32 to 63, and the resulting 32 bits

are used for addressing.

Usually, it is impossible for 32-bit mode programs to generate invalid

addresses. If context switching occurs and the processor enters Kernel mode, however, an attempt

may be made to save an address other than the sign-extended 32-bit address mentioned above to a

64-bit register. In this case, user-mode programs are likely to generate an invalid address.

Table 5-1. Comparison of useg and xuseg

Address bit

Status register bit value

Segment

Address range

Size

value

KSU

EXL

ERL

name

32-bit

A[31] = 0

useg

0x0000 0000

0x7FFF FFFF

2 Gbytes

31 bytes)

64-bit

A[63..40] = 0

xuseg

0x0000 0000 0000 0000

0x0000 00FF FFFF FFFF

1 Tbyte

40 bytes)

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