 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
VR4102 Datasheet(PDF) 123 Page - NEC |
|
|
|||||||||||||||||||||||||||||
VR4102 Datasheet(HTML) 123 Page - NEC |
|
|
123 / 701 page  CHAPTER 5 MEMORY MANAGEMENT SYSTEM 123 (1) useg (32-bit mode) In User mode, when UX = 0 in the Status register and the most significant bit of the virtual address is 0, User mode addressing is compatible with the 32-bit addressing model shown in Figure 5-4, and a 2-Gbyte user address space is available, labeled useg. Any attempt to reference an address with the most-significant bit set while in User mode causes an Address Error exception (see CHAPTER 6 EXCEPTION PROCESSING). The TLB Mismatch exception vector is used for TLB misses. (2) xuseg (64-bit mode) In User mode, when UX = 1 in the Status register and bits 63 to 40 of the virtual address are all 0, User mode addressing is extended to the 64-bit addressing model shown in Figure 5-4. In 64-bit User mode, the processor provides a single address space of 240 bytes, labeled xuseg. Any attempt to reference an address with bits 63:40 equal to 1 causes an Address Error exception (see CHAPTER 6 EXCEPTION PROCESSING). The XTLB Mismatch exception vector is used for TLB misses. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
