VR4102 datasheet(137/701 Pages) NEC

137 / 701 page

CHAPTER 5 MEMORY MANAGEMENT SYSTEM

137

5.3.1 ROM Space

The ROM space differs depending on the data bus’ bit width and the capacity of the ROM being used.

• The data bus’ bit width is set via the DBUS32 pin.

• The ROM capacity is set via the BCUNTREG1’s ROM64 bit.

The physical addresses of the ROM space are listed below.

Table 5-7. ROM Addresses (when using 16-bit data bus)

Physical address

ADD[25:0] pin

When using 32-M ROM

When using 64-M ROM

0x1FFF FFFF to 0x1FC0 0000 0x3FF FFFF to

0x3C0 0000

Bank 3 (ROMCS[3]#)

0x1FBF FFFF to 0x1F80 0000

0x3BF FFFF to

0x380 0000

Bank 2 (ROMCS[2]#)

0x1F7F FFFF to 0x1F40 0000

0x37F FFFF to

0x340 0000

Bank 1 (ROMCS[1]#)

Bank 2 (ROMCS[2]#)

0x1F3F FFFF to 0x1F00 0000

0x33F FFFF to

0x300 0000

Bank 0 (ROMCS[0]#)

0x1EFF FFFF to 0x1E80 0000

0x2FF FFFF to

0x280 0000

ROM space reserved for

future use

Bank 1 (ROMCS[1]#)

0x1E7F FFFF to 0x1E00 0000

0x27F FFFF to

0x200 0000

Bank 0 (ROMCS[0]#)

0x1DFF FFFF to 0x1800 0000

0x1FF FFFF to

0x000 0000

ROM space reserved for

future use

Table 5-8. ROM Addresses (when using 32-bit data bus)

Physical address

ADD[25:0] pin

When using 32-Mbit ROM

When using 64-Mbit ROM

0x1FFF FFFF to 0x1F80 0000

0x3FF FFFF to

0x380 0000

Bank 1 (ROMCS[1]#)

0x1F7F FFFF to 0x1F00 0000

0x37F FFFF to

0x300 0000

Bank 0 (ROMCS[0]#)

0x1EFF FFFF to 0x1E00 0000

0x2FF FFF0 to

0x200 0000

ROM space reserved for

future use

Bank 0 (ROMCS[0]#)

0x1DFF FFFF to 0x1800 0000

0x1FF FFFF to

0x000 0000

ROM space reserved for

future use

VR4102 Datasheet(PDF) 137 Page - NEC

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