VR4102 datasheet(134/701 Pages) NEC

134 / 701 page

CHAPTER 5 MEMORY MANAGEMENT SYSTEM

134

(10) 64-bit Kernel mode compatible spaces (ckseg0, ckseg1, cksseg, and ckseg3)

If the conditions listed below are satisfied in Kernel mode, ckseg0, ckseg1, cksseg, or ckseg3 (each having 512

Mbytes) is selected as a compatible space according to the state of the bits 30 and 29 (two low-order bits) of the

address.

— The KX bit of the Status register is 1.

— Bits 63 and 62 of the 64-bit virtual address are 11.

— Bits 61 to 31 of the virtual address are all 1.

(i)

ckseg0

This space is an unmapped region, compatible with the 32-bit mode kseg0 space. The K0 field of the Config

(ii) ckseg1

This space is an unmapped and uncached region, compatible with the 32-bit mode kseg1 space.

(iii) cksseg

This space is the current supervisor virtual space, compatible with the 32-bit mode ksseg space.

References to cksseg are mapped through TLB. Whether cache can be used or not is determined by bit C of

each page’s TLB entry.

(iv) ckseg3

This space is the current supervisor virtual space, compatible with the 32-bit mode kseg3 space.

References to ckseg3 are mapped through TLB. Whether cache can be used or not is determined by bit C of

each page’s TLB entry.

VR4102 Datasheet(PDF) 134 Page - NEC