VR4102 datasheet(131/701 Pages) NEC

131 / 701 page

CHAPTER 5 MEMORY MANAGEMENT SYSTEM

131

(3) kseg1 (32-bit Kernel mode, kernel space 1)

When KX = 0 in the Status register and the most-significant three bits of the virtual address space are 101, the

kseg1 virtual address space is selected; it is the current 512-Mbyte (2

29-byte) physical space.

References to kseg1 are not mapped through TLB; the physical address selected is defined by subtracting

0xA000 0000 from the virtual address.

Caches are disabled for accesses to these addresses, and main memory (or memory-mapped I/O device

registers) is accessed directly.

(4) ksseg (32-bit Kernel mode, supervisor space)

When KX = 0 in the Status register and the most-significant three bits of the virtual address space are 110, the

ksseg virtual address space is selected; it is the current 512-Mbyte (2

29-byte) virtual address space. The virtual

address is extended with the contents of the 8-bit ASID field to form a unique virtual address.

References to ksseg are mapped through TLB. Whether cache can be used or not is determined by bit C of

each page’s TLB entry.

(5) kseg3 (32-bit Kernel mode, kernel space 3)

When KX = 0 in the Status register and the most-significant three bits of the virtual address space are 111, the

kseg3 virtual address space is selected; it is the current 512-Mbyte (2

29-byte) kernel virtual space. The virtual

address is extended with the contents of the 8-bit ASID field to form a unique virtual address.

References to kseg3 are mapped through TLB. Whether cache can be used or not is determined by bit C of

each page’s TLB entry.

VR4102 Datasheet(PDF) 131 Page - NEC