VR4102 datasheet(132/701 Pages) NEC

132 / 701 page

CHAPTER 5 MEMORY MANAGEMENT SYSTEM

132

Table 5-4. 64-bit Kernel Mode Segments

Address bit

Status register bit value

Segment

Virtual address

Physical

Size

value

KSU

EXL

ERL

name

address

64-bit

A[63..62] = 00

xkuseg

0x0000 0000 0000 0000

0x0000 00FF FFFF FFFF

TLB map

1 Tbyte

40 bytes)

64-bit

A[63..62] = 01

xksseg

0x4000 0000 0000 0000

0x4000 00FF FFFF FFFF

TLB map

1 Tbyte

40 bytes)

64-bit

A[63..62] = 10

xkphys

0x8000 0000 0000 0000

0xBFFF FFFF FFFF FFFF

0x0000 0000

0xFFFF FFFF

4 Gbytes

32 bytes)

64-bit

A[63..62] = 11

xkseg

0xC000 0000 0000 0000

0xC000 00FF 7FFF FFFF

TLB map

40 - 231

bytes

64-bit

A[63..62] = 11

A[63..31] = -1

ckseg0

0xFFFF FFFF 8000 0000

0xFFFF FFFF 9FFF FFFF

0x0000 0000

0x1FFF FFFF

512 Mbytes

29 bytes)

64-bit

A[63..62] = 11

A[63..31] = -1

ckseg1

0xFFFF FFFF A000 0000

0xFFFF FFFF BFFF FFFF

0x0000 0000

0x1FFF FFFF

512 Mbytes

29 bytes)

64-bit

A[63..62] = 11

A[63..31] = -1

cksseg

0xFFFF FFFF C000 0000

0xFFFF FFFF DFFF FFFF

TLB map

512 Mbytes

29 bytes)

64-bit

A[63..62] = 11

A[63..31] = -1

KSU = 00

EXL = 1

ERL = 1

ckseg3

0xFFFF FFFF E000 0000

0xFFFF FFFF FFFF FFFF

TLB map

512 Mbytes

29 bytes)

(6) xkuseg (64-bit Kernel mode, user space)

When KX = 1 in the Status register and bits 63 and 62 of the virtual address space are 00, the xkuseg virtual

address space is selected; it is the 1-Tbyte (2

40 bytes) current user address space. The virtual address is

extended with the contents of the 8-bit ASID field to form a unique virtual address.

References to xkuseg are mapped through TLB. Whether cache can be used or not is determined by bit C of

each page’s TLB entry.

If the ERL bit of the Status register is 1, the user address space is assigned 2 Gbytes (2

31 bytes) without TLB

mapping and becomes unmapped (with virtual addresses being used as physical addresses) and uncached so

that the cache error handler can use it. This allows the Cache Error exception code to operate uncached using

r0 as a base register.

(7) xksseg (64-bit Kernel mode, current supervisor space)

When KX = 1 in the Status register and bits 63 and 62 of the virtual address space are 01, the xksseg address

space is selected; it is the 1-Tbyte (2

40 bytes)current supervisor address space. The virtual address is extended

with the contents of the 8-bit ASID field to form a unique virtual address.

References to xksseg are mapped through TLB. Whether cache can be used or not is determined by bit C of

each page’s TLB entry.

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