MCP3565R datasheet(56/108 Pages) MICROCHIP

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MCP3565R

DS20006401C-page 56

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5.14

Conversion Modes

The ADC includes several conversion modes that can

be selected through the CONV_MODE[1:0] bits located

in the CONFIG3 register. The ADC behavior, with

respect to these bits, depends on whether the ADC is

in MUX or Scan mode. Table 5-14 summarizes the

possible configurations.

5.14.1

CONVERSION MODES IN MUX

MODE

In MUX mode, the user can choose between one-shot

and continuous conversions.

A one-shot conversion is a single conversion and takes

a certain Conversion Time, TCONV (or 2 x TCONV when

AZ_MUX = 1; see Section 5.1.3 “ADC Offset Cancel-

lation Algorithm”). Once this conversion is performed,

the part automatically returns to a Standby or ADC

Shutdown state, depending on the CONV_MODE[1:0]

bits setting. The Conversion mode determined by the

CONV_MODE[1:0] bits setting will also affect the state of

the ADC_MODE[1:0] bits, as described in Table 5-14.

The conversion can be preceded by a start-up time that

depends on the ADC state (see

Section 5.11 “ADC

Start-up Timer”).

One-Shot mode is recommended for low-power, low

bandwidth applications, requiring a once in a while A/D

conversion.

In Continuous Conversion mode, the ADC is never

placed in Standby or ADC Shutdown mode and

converts continuously without any internal reset. In this

mode, the output data rate of the ADC is defined by

DRCLK (see Figure 5-5). The digital decimation filter

induces a pipeline or group delay of TCONV for the first

data ready and is structured to give a continuous

stream of data at the DRCLK rate after this first data

(the internal registers of the filter are never reset in this

mode, thus the decimation filter acts as a moving

average). Each data ready interrupt corresponds to a

valid and complete conversion that was processed

through the digital filter (the digital filter has no latency

in this respect). This mode allows a faster data rate

than the One-Shot mode, and is therefore, recom-

mended for higher bandwidth applications. The pipe-

line delay should be carefully determined and adapted

to the user needs, especially in closed-loop,

low-latency applications. This mode is recommended

for applications requiring continuous sampling/averag-

ing of the input signals. If AZ_MUX = 1, the Continuous

Conversion mode is replaced by a series of subse-

quent One-Shot mode conversions, with a reset in

between each conversion. This makes the group delay

equal to 2 x TCONV and the data rate equal to

1/(2 x TCONV).

Figure 5-14 and Figure 5-15 detail One-Shot and

Continuous Conversion modes for MUX mode.

TABLE 5-14: ADC CONVERSION MODES IN MUX OR SCAN MODES

CONV_MODE[1:0]

ADC Behavior (MUX Mode)

ADC Behavior

(Scan Mode)

ADC_MODE[1:0] Bits Setting

Performs a one-shot conversion

and automatically returns to

ADC Shutdown mode.

Performs one complete

Scan cycle and

automatically returns to

ADC Shutdown mode.

Returns to ‘0x’ after one

conversion (MUX mode) or one

Scan cycle (Scan mode).

Performs a one-shot conversion

and automatically returns to

Standby mode.

Performs one complete

Scan cycle and

automatically returns to

Standby mode.

Returns to ‘10’ after one

conversion (MUX mode) or one

Scan cycle (Scan mode).

Performs continuous

conversions.

Performs continuous

Scan cycles with

TIMER[23:0] bits delay

between each cycle.

Stays at ‘11’.

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