Electronic Components Datasheet Search
  English  ▼

X  

SLG47503 Datasheet(PDF) 52 Page - Dialog Semiconductor

Part # SLG47503
Description  Low Voltage GreenPAK Programmable Mixed-Signal Matrix
PDF  191 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

SLG47503 Datasheet(HTML) 52 Page - Dialog Semiconductor

Back Button SLG47503 Datasheet HTML 48Page - Dialog Semiconductor SLG47503 Datasheet HTML 49Page - Dialog Semiconductor SLG47503 Datasheet HTML 50Page - Dialog Semiconductor SLG47503 Datasheet HTML 51Page - Dialog Semiconductor SLG47503 Datasheet HTML 52Page - Dialog Semiconductor SLG47503 Datasheet HTML 53Page - Dialog Semiconductor SLG47503 Datasheet HTML 54Page - Dialog Semiconductor SLG47503 Datasheet HTML 55Page - Dialog Semiconductor SLG47503 Datasheet HTML 56Page - Dialog Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 52 / 191 page
background image
Datasheet
16-Jul-2021
CFR0011-120-00
Revision 2.0
52 of 191
© 2021 Dialog Semiconductor
SLG47502/03
Low Voltage GreenPAK Programmable
Mixed-Signal Matrix
Preliminary
Figure 30: 3-bit LUT9 or DFF12 or Shift Register 12
Figure 31: DFF3 to DFF12 and Shift Register 3 to Shift Register 12 Operation
3
8 memory cells
D_in
Clk
nSET/nRST
SET/RST
S1
S0
000
111
.
.
.
[7]
3-bit LUT
S0
S1
S1
S0
S0
S1
S0
S1
From Connectinon
Matrix Output [36]
3
ShRg/LUT_sel
Out[7:0]
8
3
7
4
LATCH/DFF_sel
nSET/nRST_sel
To Connection
Matrix Input [14]
ShRg_length [2:0]
1-bit NVM
7-bit NVM
LUT IN1
DFF data in
ShRg data in
LUT IN0
DFF CLK
ShRg CLK
From Connectinon
Matrix Output [35]
From Connectinon
Matrix Output [37]
LUT IN2
DFF nSet/nRST
ShRg nSet/nRST
LUT config
nQ/Q_sel
SET/RST_act_level
VDD
Data
Clk
POR
Initial Value 10011011 (x9B)
00110111 01101111 11011110 10111100 01111000 11110000 11100000 11000001 10000011 00000111
Q=ShReg_Out[0]
(see note 1)
Q=ShReg_Out[7]
(see note 2)
ShReg_Out[7:0]
(Internal Signal)
Note1
: Macrocell is configured as DFF
Note2
: Macrocell is configured as 8-bit Shift Register
00001111
Initial Value is transmitted (x9B)
Inital Value is loaded from NVM to Shift Register
x9
xB
Input Data are transmitted
MSB
LSB



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com